Index: uspace/libc/arch/sparc64/include/atomic.h
===================================================================
--- uspace/libc/arch/sparc64/include/atomic.h	(revision df4ed852a2d1b242f9bdce0a873009a2cb77cec7)
+++ uspace/libc/arch/sparc64/include/atomic.h	(revision 0f3fc9b4dfadc676e3337514570c32d8d8c9b162)
@@ -54,5 +54,5 @@
 		a = val->count;
 		b = a + i;
-		__asm__ volatile ("casx %0, %2, %1\n" : "+m" (*val), "+r" (b) : "r" (a));
+		asm volatile ("casx %0, %2, %1\n" : "+m" (*val), "+r" (b) : "r" (a));
 	} while (a != b);
 
Index: uspace/libc/arch/sparc64/include/syscall.h
===================================================================
--- uspace/libc/arch/sparc64/include/syscall.h	(revision df4ed852a2d1b242f9bdce0a873009a2cb77cec7)
+++ uspace/libc/arch/sparc64/include/syscall.h	(revision 0f3fc9b4dfadc676e3337514570c32d8d8c9b162)
@@ -47,5 +47,5 @@
 	register uint64_t a4 asm("o3") = p4;
 
-	__asm__ volatile (
+	asm volatile (
 		"ta %5\n"
 		: "=r" (a1)
Index: uspace/libc/arch/sparc64/include/thread.h
===================================================================
--- uspace/libc/arch/sparc64/include/thread.h	(revision df4ed852a2d1b242f9bdce0a873009a2cb77cec7)
+++ uspace/libc/arch/sparc64/include/thread.h	(revision 0f3fc9b4dfadc676e3337514570c32d8d8c9b162)
@@ -46,5 +46,5 @@
 static inline void __tcb_set(tcb_t *tcb)
 {
-	__asm__ volatile ("mov %0, %%g7\n" : : "r" (tcb) : "g7");
+	asm volatile ("mov %0, %%g7\n" : : "r" (tcb) : "g7");
 }
 
@@ -53,5 +53,5 @@
 	void *retval;
 
-	__asm__ volatile ("mov %%g7, %0\n" : "=r" (retval));
+	asm volatile ("mov %%g7, %0\n" : "=r" (retval));
 
 	return retval;