Changes in kernel/arch/ia32/src/smp/apic.c [5e4f22b:0f17bff] in mainline

File:

• kernel/arch/ia32/src/smp/apic.c (modified) (10 diffs)

kernel/arch/ia32/src/smp/apic.c

@@ -42 +42 @@
 #include <interrupt.h>
 #include <arch/interrupt.h>
-#include <print.h>
+#include <log.h>
 #include <arch/asm.h>
 #include <arch.h>
@@ -72 +72 @@
  *
  */
-volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000);
-volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000);
+volatile uint32_t *l_apic = (uint32_t *) L_APIC_BASE;
+volatile uint32_t *io_apic = (uint32_t *) IO_APIC_BASE;
 
 uint32_t apic_id_mask = 0;
@@ -135 +135 @@
 {
 #ifdef CONFIG_DEBUG
-        printf("cpu%u: APIC spurious interrupt\n", CPU->id);
+        log(LF_ARCH, LVL_DEBUG, "cpu%u: APIC spurious interrupt", CPU->id);
 #endif
 }
@@ -241 +241 @@
         esr.value = l_apic[ESR];
         
-        if (esr.send_checksum_error)
-                printf("Send Checksum Error\n");
-        if (esr.receive_checksum_error)
-                printf("Receive Checksum Error\n");
-        if (esr.send_accept_error)
-                printf("Send Accept Error\n");
-        if (esr.receive_accept_error)
-                printf("Receive Accept Error\n");
-        if (esr.send_illegal_vector)
-                printf("Send Illegal Vector\n");
-        if (esr.received_illegal_vector)
-                printf("Received Illegal Vector\n");
-        if (esr.illegal_register_address)
-                printf("Illegal Register Address\n");
+        if (esr.err_bitmap) {
+                log_begin(LF_ARCH, LVL_ERROR);
+                log_printf("APIC errors detected:");
+                if (esr.send_checksum_error)
+                        log_printf("\nSend Checksum Error");
+                if (esr.receive_checksum_error)
+                        log_printf("\nReceive Checksum Error");
+                if (esr.send_accept_error)
+                        log_printf("\nSend Accept Error");
+                if (esr.receive_accept_error)
+                        log_printf("\nReceive Accept Error");
+                if (esr.send_illegal_vector)
+                        log_printf("\nSend Illegal Vector");
+                if (esr.received_illegal_vector)
+                        log_printf("\nReceived Illegal Vector");
+                if (esr.illegal_register_address)
+                        log_printf("\nIllegal Register Address");
+                log_end();
+        }
         
         return !esr.err_bitmap;
 }
 
-#define DELIVS_PENDING_SILENT_RETRIES   4       
-
+/* Waits for the destination cpu to accept the previous ipi. */
 static void l_apic_wait_for_delivery(void)
 {
         icr_t icr;
-        unsigned retries = 0;
-
+        
         do {
-                if (retries++ > DELIVS_PENDING_SILENT_RETRIES) {
-                        retries = 0;
-#ifdef CONFIG_DEBUG
-                        printf("IPI is pending.\n");
-#endif
-                        delay(20);
-                }
                 icr.lo = l_apic[ICRlo];
-        } while (icr.delivs == DELIVS_PENDING);
-        
+        } while (icr.delivs != DELIVS_IDLE);
+}
+
+/** Send one CPU an IPI vector.
+ *
+ * @param apicid Physical APIC ID of the destination CPU.
+ * @param vector Interrupt vector to be sent.
+ *
+ * @return 0 on failure, 1 on success.
+ */
+int l_apic_send_custom_ipi(uint8_t apicid, uint8_t vector)
+{
+        icr_t icr;
+
+        /* Wait for a destination cpu to accept our previous ipi. */
+        l_apic_wait_for_delivery();
+        
+        icr.lo = l_apic[ICRlo];
+        icr.hi = l_apic[ICRhi];
+        
+        icr.delmod = DELMOD_FIXED;
+        icr.destmod = DESTMOD_PHYS;
+        icr.level = LEVEL_ASSERT;
+        icr.shorthand = SHORTHAND_NONE;
+        icr.trigger_mode = TRIGMOD_LEVEL;
+        icr.vector = vector;
+        icr.dest = apicid;
+
+        /* Send the IPI by writing to l_apic[ICRlo]. */
+        l_apic[ICRhi] = icr.hi;
+        l_apic[ICRlo] = icr.lo;
+        
+        return apic_poll_errors();
 }
 
@@ -289 +316 @@
 {
         icr_t icr;
+
+        /* Wait for a destination cpu to accept our previous ipi. */
+        l_apic_wait_for_delivery();
         
         icr.lo = l_apic[ICRlo];
@@ -299 +329 @@
         
         l_apic[ICRlo] = icr.lo;
-
-        l_apic_wait_for_delivery();
         
         return apic_poll_errors();
@@ -489 +517 @@
 {
 #ifdef LAPIC_VERBOSE
-        printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n",
+        log_begin(LF_ARCH, LVL_DEBUG);
+        log_printf("LVT on cpu%u, LAPIC ID: %" PRIu8 "\n",
             CPU->id, l_apic_id());
         
         lvt_tm_t tm;
         tm.value = l_apic[LVT_Tm];
-        printf("LVT Tm: vector=%" PRIu8 ", %s, %s, %s\n",
+        log_printf("LVT Tm: vector=%" PRIu8 ", %s, %s, %s\n",
             tm.vector, delivs_str[tm.delivs], mask_str[tm.masked],
             tm_mode_str[tm.mode]);
@@ -500 +529 @@
         lvt_lint_t lint;
         lint.value = l_apic[LVT_LINT0];
-        printf("LVT LINT0: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",
+        log_printf("LVT LINT0: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",
             tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs],
             intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode],
@@ -506 +535 @@
         
         lint.value = l_apic[LVT_LINT1];
-        printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",
+        log_printf("LVT LINT1: vector=%" PRIu8 ", %s, %s, %s, irr=%u, %s, %s\n",
             tm.vector, delmod_str[lint.delmod], delivs_str[lint.delivs],
             intpol_str[lint.intpol], lint.irr, trigmod_str[lint.trigger_mode],
@@ -513 +542 @@
         lvt_error_t error;
         error.value = l_apic[LVT_Err];
-        printf("LVT Err: vector=%" PRIu8 ", %s, %s\n", error.vector,
+        log_printf("LVT Err: vector=%" PRIu8 ", %s, %s\n", error.vector,
             delivs_str[error.delivs], mask_str[error.masked]);
+        log_end();
 #endif
 }