Index: kernel/arch/mips32/src/start.S
===================================================================
--- kernel/arch/mips32/src/start.S	(revision 53c8d12b7aeb262a2ee3fa75123776f8514862d5)
+++ kernel/arch/mips32/src/start.S	(revision 0ddb84bb98a7fc366e9b5d64c843a901e8fa3c38)
@@ -32,4 +32,5 @@
 #include <arch/context_offset.h>
 #include <arch/stack.h>
+#include <arch/istate_struct.h>
 
 .text
@@ -51,43 +52,4 @@
 #define REG_SAVE_MASK 0x1f
 
-#define ISTATE_OFFSET_A0	0
-#define ISTATE_OFFSET_A1	4
-#define ISTATE_OFFSET_A2	8
-#define ISTATE_OFFSET_A3	12
-#define ISTATE_OFFSET_T0	16
-#define ISTATE_OFFSET_T1	20
-#define ISTATE_OFFSET_V0	24
-#define ISTATE_OFFSET_V1	28
-#define ISTATE_OFFSET_AT	32
-#define ISTATE_OFFSET_T2	36
-#define ISTATE_OFFSET_T3	40
-#define ISTATE_OFFSET_T4	44
-#define ISTATE_OFFSET_T5	48
-#define ISTATE_OFFSET_T6	52
-#define ISTATE_OFFSET_T7	56
-#define ISTATE_OFFSET_S0	60
-#define ISTATE_OFFSET_S1	64
-#define ISTATE_OFFSET_S2	68
-#define ISTATE_OFFSET_S3	72
-#define ISTATE_OFFSET_S4	76
-#define ISTATE_OFFSET_S5	80
-#define ISTATE_OFFSET_S6	84
-#define ISTATE_OFFSET_S7	88
-#define ISTATE_OFFSET_T8	92
-#define ISTATE_OFFSET_T9	96
-#define ISTATE_OFFSET_KT0	100
-#define ISTATE_OFFSET_KT1	104
-#define ISTATE_OFFSET_GP	108
-#define ISTATE_OFFSET_SP	112
-#define ISTATE_OFFSET_S8	116
-#define ISTATE_OFFSET_RA	120
-#define ISTATE_OFFSET_LO	124
-#define ISTATE_OFFSET_HI	128
-#define ISTATE_OFFSET_STATUS	132
-#define ISTATE_OFFSET_EPC	136
-#define ISTATE_OFFSET_ALIGNMENT	140
-
-#define ISTATE_SOFT_SIZE	144
-
 /*
  * The fake ABI prologue is never executed and may not be part of the
@@ -97,5 +59,5 @@
  */
 .macro FAKE_ABI_PROLOGUE
-	sub $sp, ISTATE_SOFT_SIZE
+	sub $sp, ISTATE_SIZE
 	sw $ra, ISTATE_OFFSET_EPC($sp)
 .endm
@@ -265,5 +227,5 @@
 	KERNEL_STACK_TO_K0
 	
-	sub $k0, ISTATE_SOFT_SIZE
+	sub $k0, ISTATE_SIZE
 	sw $sp, ISTATE_OFFSET_SP($k0)
 	move $sp, $k0
@@ -355,5 +317,5 @@
 tlb_refill_handler:
 	KERNEL_STACK_TO_K0
-	sub $k0, ISTATE_SOFT_SIZE
+	sub $k0, ISTATE_SIZE
 	REGISTERS_STORE_AND_EXC_RESET $k0
 	sw $sp, ISTATE_OFFSET_SP($k0)
@@ -371,5 +333,5 @@
 cache_error_handler:
 	KERNEL_STACK_TO_K0
-	sub $k0, ISTATE_SOFT_SIZE
+	sub $k0, ISTATE_SIZE
 	REGISTERS_STORE_AND_EXC_RESET $k0
 	sw $sp, ISTATE_OFFSET_SP($k0)