Index: kernel/arch/mips32/src/mm/frame.c
===================================================================
--- kernel/arch/mips32/src/mm/frame.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
+++ kernel/arch/mips32/src/mm/frame.c	(revision 0c793e2e9c4358a2bb2521d35eb36b273cf0283b)
@@ -82,5 +82,5 @@
 	if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
 		return false;
-	
+
 	/* MSIM device (dkeyboard) */
 	if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
@@ -92,5 +92,5 @@
 		return false;
 #endif
-	
+
 	return true;
 }
@@ -108,15 +108,15 @@
 	if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
 		return false;
-	
+
 	/* Kernel */
 	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
 	    KA2PA(config.base), config.kernel_size))
 		return false;
-	
+
 	/* Kernel stack */
 	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
 	    KA2PA(config.stack_base), config.stack_size))
 		return false;
-	
+
 	/* Init tasks */
 	bool safe = true;
@@ -128,5 +128,5 @@
 			break;
 		}
-	
+
 	return safe;
 }
@@ -161,5 +161,5 @@
 			    ZONE_AVAILABLE | ZONE_HIGHMEM);
 	}
-	
+
 	if (phys_regions_count < MAX_REGIONS) {
 		phys_regions[phys_regions_count].start = first;
@@ -182,5 +182,5 @@
 {
 	ipl_t ipl = interrupts_disable();
-	
+
 	/* Clear and initialize TLB */
 	cp0_pagemask_write(ZERO_PAGE_MASK);
@@ -194,9 +194,9 @@
 		tlbwi();
 	}
-		
+
 	pfn_t start_frame = 0;
 	pfn_t frame;
 	bool avail = true;
-	
+
 	/* Walk through all 1 MB frames */
 	for (frame = 0; frame < ZERO_FRAMES; frame++) {
@@ -211,5 +211,5 @@
 				tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
 				tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
-				
+
 				cp0_pagemask_write(ZERO_PAGE_MASK);
 				cp0_entry_lo0_write(lo0.value);
@@ -218,5 +218,5 @@
 				cp0_index_write(ZERO_PAGE_TLBI);
 				tlbwi();
-				
+
 				ZERO_PAGE_VALUE = 0;
 				if (ZERO_PAGE_VALUE != 0)
@@ -229,5 +229,5 @@
 			}
 		}
-		
+
 		if (!avail) {
 			frame_add_region(start_frame, frame, true);
@@ -236,7 +236,7 @@
 		}
 	}
-	
+
 	frame_add_region(start_frame, frame, true);
-	
+
 	/* Blacklist interrupt vector frame */
 	frame_mark_unavailable(0, 1);
@@ -267,5 +267,5 @@
 	frame_mark_unavailable(0, 1024 * 1024 / FRAME_SIZE);
 #endif
-	
+
 	/* Cleanup */
 	cp0_pagemask_write(ZERO_PAGE_MASK);
@@ -275,5 +275,5 @@
 	cp0_index_write(ZERO_PAGE_TLBI);
 	tlbwi();
-	
+
 	interrupts_restore(ipl);
 }
@@ -286,5 +286,5 @@
 {
 	printf("[base    ] [size    ]\n");
-	
+
 	size_t i;
 	for (i = 0; i < phys_regions_count; i++) {
Index: kernel/arch/mips32/src/mm/tlb.c
===================================================================
--- kernel/arch/mips32/src/mm/tlb.c	(revision 1b20da07baaa3e3c424f62c927274e676e4295cd)
+++ kernel/arch/mips32/src/mm/tlb.c	(revision 0c793e2e9c4358a2bb2521d35eb36b273cf0283b)
@@ -76,10 +76,10 @@
 
 	/* Clear and initialize TLB. */
-	
+
 	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
 		cp0_index_write(i);
 		tlbwi();
 	}
-	
+
 	/*
 	 * The kernel is going to make use of some wired
@@ -98,5 +98,5 @@
 	uintptr_t badvaddr;
 	pte_t pte;
-	
+
 	badvaddr = cp0_badvaddr_read();
 
@@ -291,16 +291,16 @@
 	lo1_save.value = cp0_entry_lo1_read();
 	mask_save.value = cp0_pagemask_read();
-	
+
 	printf("[nr] [asid] [vpn2    ] [mask] [gvdc] [pfn     ]\n");
-	
+
 	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
 		cp0_index_write(i);
 		tlbr();
-		
+
 		mask.value = cp0_pagemask_read();
 		hi.value = cp0_entry_hi_read();
 		lo0.value = cp0_entry_lo0_read();
 		lo1.value = cp0_entry_lo1_read();
-		
+
 		printf("%-4u %-6u %0#10x %-#6x  %1u%1u%1u%1u  %0#10x\n",
 		    i, hi.asid, HI_VPN22ADDR(hi.vpn2), mask.mask,
@@ -309,5 +309,5 @@
 		    lo1.g, lo1.v, lo1.d, lo1.c, LO_PFN2ADDR(lo1.pfn));
 	}
-	
+
 	cp0_entry_hi_write(hi_save.value);
 	cp0_entry_lo0_write(lo0_save.value);
@@ -339,8 +339,8 @@
 		cp0_entry_lo0_write(lo0.value);
 		cp0_entry_lo1_write(lo1.value);
-				
+
 		tlbwi();
 	}
-	
+
 	cp0_entry_hi_write(hi_save.value);
 }
@@ -360,11 +360,11 @@
 
 	hi_save.value = cp0_entry_hi_read();
-	
+
 	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
 		cp0_index_write(i);
 		tlbr();
-		
+
 		hi.value = cp0_entry_hi_read();
-		
+
 		if (hi.asid == asid) {
 			lo0.value = cp0_entry_lo0_read();
@@ -380,5 +380,5 @@
 		}
 	}
-	
+
 	cp0_entry_hi_write(hi_save.value);
 }
@@ -399,5 +399,5 @@
 
 	assert(interrupts_disabled());
-	
+
 	if (asid == ASID_INVALID)
 		return;
@@ -431,5 +431,5 @@
 		}
 	}
-	
+
 	cp0_entry_hi_write(hi_save.value);
 }