Index: kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c
===================================================================
--- kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c	(revision 3d9d948e378b0a89cdfe85faff72342bf5b81f1e)
+++ kernel/genarch/src/drivers/s3c24xx_uart/s3c24xx_uart.c	(revision 0c39b96f240cc84cb85e0065c8c0d871185a2afc)
@@ -46,12 +46,4 @@
 #include <sysinfo/sysinfo.h>
 #include <str.h>
-
-/* Bits in UTRSTAT register */
-#define S3C24XX_UTRSTAT_TX_EMPTY	0x4
-#define S3C24XX_UTRSTAT_RDATA		0x1
-
-#define S3C24XX_UFSTAT_TX_FULL		0x4000
-#define S3C24XX_UFSTAT_RX_FULL		0x0040
-#define S3C24XX_UFSTAT_RX_COUNT		0x002f
 
 static void s3c24xx_uart_sendb(outdev_t *dev, uint8_t byte)
@@ -129,9 +121,10 @@
 
 	/* Enable FIFO, Tx trigger level: empty, Rx trigger level: 1 byte. */
-	pio_write_32(&uart->io->ufcon, 0x01);
+	pio_write_32(&uart->io->ufcon, UFCON_FIFO_ENABLE |
+	    UFCON_TX_FIFO_TLEVEL_EMPTY | UFCON_RX_FIFO_TLEVEL_1B);
 
 	/* Set RX interrupt to pulse mode */
 	pio_write_32(&uart->io->ucon,
-	    pio_read_32(&uart->io->ucon) & ~(1 << 8));
+	    pio_read_32(&uart->io->ucon) & ~UCON_RX_INT_LEVEL);
 
 	if (!fb_exported) {