Changeset 0c12dfe in mainline


Ignore:
Timestamp:
2012-11-20T12:57:46Z (12 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
9c0eba6
Parents:
68338c6
Message:

typos and comments

Location:
uspace/drv/infrastructure/rootamdm37x
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/infrastructure/rootamdm37x/cm/mpu.h

    r68338c6 r0c12dfe  
    8787
    8888        const ioport32_t clkstst;
    89 #define MPU_CM_CLKSTST_CLKACTIVITY_MPU_ACTICE_FLAG   (1 << 0)
     89#define MPU_CM_CLKSTST_CLKACTIVITY_MPU_ACTIVE_FLAG   (1 << 0)
    9090
    9191} mpu_cm_regs_t;
  • uspace/drv/infrastructure/rootamdm37x/rootamdm37x.c

    r68338c6 r0c12dfe  
    155155
    156156        /* Current MPU frequency. */
    157         if (pio_read_32(&mpu->clkstst) & MPU_CM_CLKSTST_CLKACTIVITY_MPU_ACTICE_FLAG) {
     157        if (pio_read_32(&mpu->clkstst) & MPU_CM_CLKSTST_CLKACTIVITY_MPU_ACTIVE_FLAG) {
    158158                if (pio_read_32(&mpu->idlest_pll) & MPU_CM_IDLEST_PLL_ST_MPU_CLK_LOCKED_FLAG) {
    159159                        /* DPLL active and locked */
     
    224224         * we can probably turn this off entirely (DSS is still non-functional).
    225225         */
    226         /* Set DPLL4 to automatic to save power*/
     226        /* Set DPLL4 to automatic to save power */
    227227        pio_change_32(&device->cm.clocks->autoidle_pll,
    228228            CLOCK_CONTROL_CM_AUTOIDLE_PLL_AUTO_PERIPH_DPLL_AUTOMATIC,
     
    234234         */
    235235        // TODO setup DPLL5
    236         /* Set DPLL5 to automatic */
     236        /* Set DPLL5 to automatic to save power */
    237237        pio_change_32(&device->cm.clocks->autoidle2_pll,
    238238            CLOCK_CONTROL_CM_AUTOIDLE2_PLL_AUTO_PERIPH2_DPLL_AUTOMATIC,
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