Changeset 0b9ac3c in mainline for kernel/arch/sparc64/src


Ignore:
Timestamp:
2010-02-23T19:03:28Z (16 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
c62d2e1
Parents:
1ccafee (diff), 5e50394 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

Location:
kernel/arch/sparc64/src
Files:
18 added
6 edited
12 moved

Legend:

Unmodified
Added
Removed

  • kernel/arch/sparc64/src/asm.S

    r1ccafee r0b9ac3c  
    2929#include <arch/arch.h>
    3030#include <arch/stack.h>
    31 #include <arch/regdef.h>
    32 #include <arch/mm/mmu.h>
    3331
    3432.text
    … …  
    234232        nop
    235233
    236 
    237 .macro WRITE_ALTERNATE_REGISTER reg, bit
    238         rdpr %pstate, %g1                               ! save PSTATE.PEF
    239         wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate
    240         mov %o0, \reg
    241         wrpr %g0, PSTATE_PRIV_BIT, %pstate
    242         retl
    243         wrpr %g1, 0, %pstate                            ! restore PSTATE.PEF
    244 .endm
    245 
    246 .macro READ_ALTERNATE_REGISTER reg, bit
    247         rdpr %pstate, %g1                               ! save PSTATE.PEF
    248         wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate
    249         mov \reg, %o0
    250         wrpr %g0, PSTATE_PRIV_BIT, %pstate
    251         retl
    252         wrpr %g1, 0, %pstate                            ! restore PSTATE.PEF
    253 .endm
    254 
    255 .global write_to_ag_g6
    256 write_to_ag_g6:
    257         WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT
    258 
    259 .global write_to_ag_g7
    260 write_to_ag_g7:
    261         WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
    262 
    263 .global write_to_ig_g6
    264 write_to_ig_g6:
    265         WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT
    266 
    267 .global read_from_ag_g7
    268 read_from_ag_g7:
    269         READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT
    270 
    271 
    272 /** Switch to userspace.
    273  *
    274  * %o0  Userspace entry address.
    275  * %o1  Userspace stack pointer address.
    276  * %o2  Userspace address of uarg structure.
    277  */
    278 .global switch_to_userspace
    279 switch_to_userspace:
    280         save %o1, -(STACK_WINDOW_SAVE_AREA_SIZE + STACK_ARG_SAVE_AREA_SIZE), %sp
    281         flushw
    282         wrpr %g0, 0, %cleanwin          ! avoid information leak
    283 
    284         mov %i2, %o0                    ! uarg
    285         xor %o1, %o1, %o1               ! %o1 is defined to hold pcb_ptr
    286                                         ! set it to 0
    287 
    288         clr %i2
    289         clr %i3
    290         clr %i4
    291         clr %i5
    292         clr %i6
    293 
    294         wrpr %g0, 1, %tl                ! enforce mapping via nucleus
    295 
    296         rdpr %cwp, %g1
    297         wrpr %g1, TSTATE_IE_BIT, %tstate
    298         wrpr %i0, 0, %tnpc
    299        
    300         /*
    301          * Set primary context according to secondary context.
    302          * Secondary context has been already installed by
    303          * higher-level functions.
    304          */
    305         wr %g0, ASI_DMMU, %asi
    306         ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1
    307         stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi
    308         flush %i7
    309 
    310         /*
    311          * Spills and fills will be handled by the userspace handlers.
    312          */
    313         wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate
    314        
    315         done                            ! jump to userspace
    316 

  • kernel/arch/sparc64/src/drivers/kbd.c

    r1ccafee r0b9ac3c  
    3939#include <console/console.h>
    4040#include <ddi/irq.h>
     41#include <mm/page.h>
    4142#include <arch/mm/page.h>
    4243#include <arch/types.h>

  • kernel/arch/sparc64/src/drivers/tick.c

    r1ccafee r0b9ac3c  
    5454        interrupt_register(14, "tick_int", tick_interrupt);
    5555        compare.int_dis = false;
    56         compare.tick_cmpr = CPU->arch.clock_frequency / HZ;
     56        compare.tick_cmpr = tick_counter_read() +
     57                CPU->arch.clock_frequency / HZ;
    5758        CPU->arch.next_tick_cmpr = compare.tick_cmpr;
    5859        tick_compare_write(compare.value);
    59         tick_write(0);
    6060
    61 #if defined (US3)
     61#if defined (US3) || defined (SUN4V)
    6262        /* disable STICK interrupts and clear any pending ones */
    6363        tick_compare_reg_t stick_compare;
    … …  
    111111         * overflow only in 146 years.
    112112         */
    113         drift = tick_read() - CPU->arch.next_tick_cmpr;
     113        drift = tick_counter_read() - CPU->arch.next_tick_cmpr;
    114114        while (drift > CPU->arch.clock_frequency / HZ) {
    115115                drift -= CPU->arch.clock_frequency / HZ;
    116116                CPU->missed_clock_ticks++;
    117117        }
    118         CPU->arch.next_tick_cmpr = tick_read() +
     118        CPU->arch.next_tick_cmpr = tick_counter_read() +
    119119            (CPU->arch.clock_frequency / HZ) - drift;
    120120        tick_compare_write(CPU->arch.next_tick_cmpr);

  • kernel/arch/sparc64/src/mm/page.c

    r1ccafee r0b9ac3c  
    3333 */
    3434
     35#include <mm/page.h>
    3536#include <arch/mm/page.h>
    3637#include <arch/mm/tlb.h>

  • kernel/arch/sparc64/src/mm/sun4u/tlb.c

    r1ccafee r0b9ac3c  
    3737#include <mm/as.h>
    3838#include <mm/asid.h>
    39 #include <genarch/mm/page_ht.h>
    4039#include <arch/mm/frame.h>
    4140#include <arch/mm/page.h>
    … …  
    5150#include <panic.h>
    5251#include <arch/asm.h>
     52#include <genarch/mm/page_ht.h>
    5353
    5454#ifdef CONFIG_TSB
    … …  
    476476}
    477477
    478 void dump_sfsr_and_sfar(void)
     478void describe_dmmu_fault(void)
    479479{
    480480        tlb_sfsr_reg_t sfsr;
    … …  
    499499}
    500500
     501void dump_sfsr_and_sfar(void)
     502{
     503        tlb_sfsr_reg_t sfsr;
     504        uintptr_t sfar;
     505
     506        sfsr.value = dtlb_sfsr_read();
     507        sfar = dtlb_sfar_read();
     508       
     509#if defined (US)
     510        printf("DTLB SFSR: asi=%#x, ft=%#x, e=%d, ct=%d, pr=%d, w=%d, ow=%d, "
     511            "fv=%d\n", sfsr.asi, sfsr.ft, sfsr.e, sfsr.ct, sfsr.pr, sfsr.w,
     512            sfsr.ow, sfsr.fv);
     513#elif defined (US3)
     514        printf("DTLB SFSR: nf=%d, asi=%#x, tm=%d, ft=%#x, e=%d, ct=%d, pr=%d, "
     515            "w=%d, ow=%d, fv=%d\n", sfsr.nf, sfsr.asi, sfsr.tm, sfsr.ft,
     516            sfsr.e, sfsr.ct, sfsr.pr, sfsr.w, sfsr.ow, sfsr.fv);
     517#endif
     518           
     519        printf("DTLB SFAR: address=%p\n", sfar);
     520       
     521        dtlb_sfsr_write(0);
     522}
     523
    501524#if defined (US)
    502525/** Invalidate all unlocked ITLB and DTLB entries. */

  • kernel/arch/sparc64/src/smp/sun4u/ipi.c

    r1ccafee r0b9ac3c  
    9999        status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
    100100        if (status & INTR_DISPATCH_STATUS_BUSY)
    101                 panic("Interrupt Dispatch Status busy bit set.");
     101                panic("Interrupt Dispatch Status busy bit set\n");
    102102       
    103103        ASSERT(!(pstate_read() & PSTATE_IE_BIT));
    … …  
    152152                break;
    153153        default:
    154                 panic("Unknown IPI (%d).", ipi);
     154                panic("Unknown IPI (%d).\n", ipi);
    155155                break;
    156156        }

  • kernel/arch/sparc64/src/smp/sun4u/smp.c

    r1ccafee r0b9ac3c  
    6262{
    6363        ofw_tree_node_t *node;
    64         size_t cnt = 0;
     64        unsigned int cnt = 0;
    6565       
    6666        if (is_us() || is_us_iii()) {

  • kernel/arch/sparc64/src/sun4u/sparc64.c

    r1ccafee r0b9ac3c  
    4444#include <arch/mm/page.h>
    4545#include <arch/stack.h>
     46#include <interrupt.h>
    4647#include <genarch/ofw/ofw_tree.h>
    4748#include <userspace.h>
    … …  
    166167}
    167168
     169void irq_initialize_arch(irq_t *irq)
     170{
     171        (void) irq;
     172}
     173
    168174/** @}
    169175 */

  • kernel/arch/sparc64/src/trap/exception.c

    r1ccafee r0b9ac3c  
    162162        fault_if_from_uspace(istate, "%s.", __func__);
    163163        dump_istate(istate);
    164         dump_sfsr_and_sfar();
     164        describe_dmmu_fault();
    165165        panic("%s.", __func__);
    166166}

  • kernel/arch/sparc64/src/trap/interrupt.c

    r1ccafee r0b9ac3c  
    11/*
    22 * Copyright (c) 2005 Jakub Jermar
     3 * Copyright (c) 2009 Pavel Rimsky
    34 * All rights reserved.
    45 *
    … …  
    3435
    3536#include <arch/interrupt.h>
     37#include <arch/trap/interrupt.h>
    3638#include <arch/sparc64.h>
    37 #include <arch/trap/interrupt.h>
    3839#include <interrupt.h>
    3940#include <ddi/irq.h>
    … …  
    6061        exc_register(n - 1, name, f);
    6162}
    62 
    63 /** Process hardware interrupt.
    64  *
    65  * @param n Ignored.
    66  * @param istate Ignored.
    67  */
    68 void interrupt(int n, istate_t *istate)
    69 {
    70         uint64_t status;
    71         uint64_t intrcv;
    72         uint64_t data0;
    73         status = asi_u64_read(ASI_INTR_DISPATCH_STATUS, 0);
    74         if (status & (!INTR_DISPATCH_STATUS_BUSY))
    75                 panic("Interrupt Dispatch Status busy bit not set.");
    76 
    77         intrcv = asi_u64_read(ASI_INTR_RECEIVE, 0);
    78 #if defined (US)
    79         data0 = asi_u64_read(ASI_INTR_R, ASI_UDB_INTR_R_DATA_0);
    80 #elif defined (US3)
    81         data0 = asi_u64_read(ASI_INTR_R, VA_INTR_R_DATA_0);
    82 #endif
    83 
    84         irq_t *irq = irq_dispatch_and_lock(data0);
    85         if (irq) {
    86                 /*
    87                  * The IRQ handler was found.
    88                  */
    89                 irq->handler(irq);
    90                 /*
    91                  * See if there is a clear-interrupt-routine and call it.
    92                  */
    93                 if (irq->cir) {
    94                         irq->cir(irq->cir_arg, irq->inr);
    95                 }
    96                 spinlock_unlock(&irq->lock);
    97         } else if (data0 > config.base) {
    98                 /*
    99                  * This is a cross-call.
    100                  * data0 contains address of the kernel function.
    101                  * We call the function only after we verify
    102                  * it is one of the supported ones.
    103                  */
    104 #ifdef CONFIG_SMP
    105                 if (data0 == (uintptr_t) tlb_shootdown_ipi_recv) {
    106                         tlb_shootdown_ipi_recv();
    107                 }
    108 #endif
    109         } else {
    110                 /*
    111                  * Spurious interrupt.
    112                  */
    113 #ifdef CONFIG_DEBUG
    114                 printf("cpu%u: spurious interrupt (intrcv=%#" PRIx64
    115                     ", data0=%#" PRIx64 ")\n", CPU->id, intrcv, data0);
    116 #endif
    117         }
    118 
    119         membar();
    120         asi_u64_write(ASI_INTR_RECEIVE, 0, 0);
    121 }
    122 
    12363/** @}
    12464 */
Note: See TracChangeset for help on using the changeset viewer.