Index: arch/ia32/include/barrier.h
===================================================================
--- arch/ia32/include/barrier.h	(revision 0187fd0f63f7e35337d090facb98c6070f944ee1)
+++ arch/ia32/include/barrier.h	(revision 0b5ac364286bd4f71ec8dbd05e4d57b5bd850133)
@@ -30,4 +30,6 @@
 #define __ia32_BARRIER_H__
 
+#include <arch/types.h>
+
 /*
  * NOTE:
@@ -44,4 +46,13 @@
 #define CS_LEAVE_BARRIER()	__asm__ volatile ("" ::: "memory")
 
+static inline void cpuid_serialization(void)
+{
+	__asm__ volatile (
+		"xorl %%eax, %%eax\n"
+		"cpuid\n"
+		::: "eax", "ebx", "ecx", "edx", "memory"
+	);
+}
+
 #ifdef CONFIG_FENCES_P4
 #	define memory_barrier()	__asm__ volatile ("mfence\n" ::: "memory")
@@ -49,7 +60,11 @@
 #	define write_barrier()		__asm__ volatile ("sfence\n" ::: "memory")
 #elif CONFIG_FENCES_P3
-#	define memory_barrier()	__asm__ volatile ("\n" ::: "memory")
-#	define read_barrier()		__asm__ volatile ("\n" ::: "memory")
+#	define memory_barrier()		cpuid_serialization()
+#	define read_barrier()		cpuid_serialization()
 #	define write_barrier()		__asm__ volatile ("sfence\n" ::: "memory")
+#else
+#	define memory_barrier()		cpuid_serialization()
+#	define read_barrier()		cpuid_serialization()
+#	define write_barrier()		cpuid_serialization()
 #endif