Index: kernel/arch/sparc64/include/barrier.h
===================================================================
--- kernel/arch/sparc64/include/barrier.h	(revision 29b2bbf5311052c0b1ad8971cfac6843f0ef6a1b)
+++ kernel/arch/sparc64/include/barrier.h	(revision 0b414b5bfb083f200dcb33bd41d7b8a75f79142e)
@@ -37,5 +37,7 @@
 
 /*
- * TODO: Implement true SPARC V9 memory barriers for macros below.
+ * We assume TSO memory model in which only reads can pass earlier stores
+ * (but not earlier reads). Therefore, CS_ENTER_BARRIER() and CS_LEAVE_BARRIER()
+ * can be empty.
  */
 #define CS_ENTER_BARRIER()	__asm__ volatile ("" ::: "memory")