Index: boot/arch/arm32/include/mm.h
===================================================================
--- boot/arch/arm32/include/mm.h	(revision 1a3a6324d0b518b6a2bb70b339b7ebb916432c2a)
+++ boot/arch/arm32/include/mm.h	(revision 0acd3399ba1eed434dfaab9035233086c868ad07)
@@ -58,4 +58,10 @@
 #define GTA02_IOMEM_END  0x60000000
 
+/** Start of ram memory on BBxM */
+#define BBXM_RAM_START   0x80000000
+/** Start of ram memory on BBxM */
+#define BBXM_RAM_END   0xc0000000
+
+
 /* Page table level 0 entry - "section" format is used
  * (one-level paging, 1 MB sized pages). Used only while booting the kernel.
Index: boot/arch/arm32/src/mm.c
===================================================================
--- boot/arch/arm32/src/mm.c	(revision 1a3a6324d0b518b6a2bb70b339b7ebb916432c2a)
+++ boot/arch/arm32/src/mm.c	(revision 0acd3399ba1eed434dfaab9035233086c868ad07)
@@ -56,7 +56,10 @@
 	else
 		return 1;
-#else
+#elif defined MACHINE_beagleboardxm
+	const unsigned long address = section << PTE_SECTION_SHIFT;
+	if (address >= BBXM_RAM_START && address < BBXM_RAM_END)
+		return 1;
+#endif
 	return 0;
-#endif
 }
 
Index: kernel/arch/arm32/src/cpu/cpu.c
===================================================================
--- kernel/arch/arm32/src/cpu/cpu.c	(revision 1a3a6324d0b518b6a2bb70b339b7ebb916432c2a)
+++ kernel/arch/arm32/src/cpu/cpu.c	(revision 0acd3399ba1eed434dfaab9035233086c868ad07)
@@ -98,4 +98,8 @@
 void cpu_arch_init(void)
 {
+	/* Get rid of any boot code hiding in ICache
+	 * This is safe without regards to ICache state. */
+	smc_coherence();
+
 	uint32_t control_reg = 0;
 	asm volatile (