Index: kernel/arch/arm32/src/exception.c
===================================================================
--- kernel/arch/arm32/src/exception.c	(revision 8b6930d5d4a9a2fdd17c45b45770dd51a1d956a6)
+++ kernel/arch/arm32/src/exception.c	(revision 09696b54e45f82c8af19ae8631ec4086bc08f08d)
@@ -174,17 +174,16 @@
 void istate_decode(istate_t *istate)
 {
-	printf("r0 =%#0" PRIx32 "\tr1 =%#0" PRIx32 "\t"
-	    "r2 =%#0" PRIx32 "\tr3 =%#0" PRIx32 "\n",
+	printf("r0 =%0#10" PRIx32 "\tr1 =%0#10" PRIx32 "\t"
+	    "r2 =%0#10" PRIx32 "\tr3 =%0#10" PRIx32 "\n",
 	    istate->r0, istate->r1, istate->r2, istate->r3);
-	printf("r4 =%#" PRIx32 "\tr5 =%#0" PRIx32 "\t"
-	    "r6 =%#0" PRIx32 "\tr7 =%#0" PRIx32 "\n",
+	printf("r4 =%0#10" PRIx32 "\tr5 =%0#10" PRIx32 "\t"
+	    "r6 =%0#10" PRIx32 "\tr7 =%0#10" PRIx32 "\n",
 	    istate->r4, istate->r5, istate->r6, istate->r7);
-	printf("r8 =%#0" PRIx32 "\tr9 =%#0" PRIx32 "\t"
-	    "r10=%#0" PRIx32 "\tfp =%p\n",
-	    istate->r8, istate->r9, istate->r10,
-	    (void *) istate->fp);
-	printf("r12=%#0" PRIx32 "\tsp =%p\tlr =%p\tspsr=%p\n",
-	    istate->r12, (void *) istate->sp,
-	    (void *) istate->lr, (void *) istate->spsr);
+	printf("r8 =%0#10" PRIx32 "\tr9 =%0#10" PRIx32 "\t"
+	    "r10=%0#10" PRIx32 "\tfp =%0#10" PRIx32 "\n",
+	    istate->r8, istate->r9, istate->r10, istate->fp);
+	printf("r12=%0#10" PRIx32 "\tsp =%0#10" PRIx32 "\t"
+	    "lr =%0#10" PRIx32 "\tspsr=%0#10" PRIx32 "\n",
+	    istate->r12, istate->sp, istate->lr, istate->spsr);
 }
 
