Index: .bzrignore =================================================================== --- .bzrignore (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ .bzrignore (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -28,4 +28,5 @@ uspace/app/dnsres/dnsres uspace/app/edit/edit +uspace/app/fontviewer/fontviewer uspace/app/getterm/getterm uspace/app/inet/inet @@ -79,4 +80,5 @@ uspace/dist/app/dnsres uspace/dist/app/edit +uspace/dist/app/fontviewer uspace/dist/app/getterm uspace/dist/app/inet @@ -134,5 +136,5 @@ uspace/dist/drv/root/ uspace/dist/drv/rootpc/ -uspace/dist/drv/rootvirt/ +uspace/dist/drv/virt/ uspace/dist/drv/rtl8139/ uspace/dist/drv/rtl8169/ @@ -202,7 +204,7 @@ uspace/drv/char/xtkbd/xtkbd uspace/drv/fb/kfb/kfb -uspace/drv/infrastructure/root/root -uspace/drv/infrastructure/rootpc/rootpc -uspace/drv/infrastructure/rootvirt/rootvirt +uspace/drv/root/root/root +uspace/drv/root/virt/virt +uspace/drv/platform/rootpc/rootpc uspace/drv/nic/e1k/e1k uspace/drv/nic/ne2k/ne2k Index: HelenOS.config =================================================================== --- HelenOS.config (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ HelenOS.config (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -37,5 +37,4 @@ @ "ia64" IA-64 64-bit @ "mips32" MIPS 32-bit -@ "mips64" MIPS 64-bit @ "ppc32" PowerPC 32-bit @ "sparc32" SPARCv8 32-bit @@ -48,8 +47,4 @@ @ "lmalta" MIPS Malta Development Board little endian ! [PLATFORM=mips32] MACHINE (choice) - -% Machine type -@ "msim" MSIM -! [PLATFORM=mips64] MACHINE (choice) % Machine type @@ -179,8 +174,4 @@ % Kernel architecture -@ "mips64" -! [PLATFORM=mips64] KARCH (choice) - -% Kernel architecture @ "ppc32" ! [PLATFORM=ppc32] KARCH (choice) @@ -230,8 +221,4 @@ % User space architecture -@ "mips64" -! [PLATFORM=mips64] UARCH (choice) - -% User space architecture @ "ppc32" ! [PLATFORM=ppc32] UARCH (choice) @@ -279,8 +266,4 @@ @ "mips32" ! [PLATFORM=mips32] BARCH (choice) - -% Boot architecture -@ "mips64" -! [PLATFORM=mips64] BARCH (choice) % Boot architecture @@ -310,8 +293,4 @@ @ "elf" ! [PLATFORM=mips32&(MACHINE=bmalta|MACHINE=lmalta)] IMAGE (choice) - -% Image format -@ "binary" -! [PLATFORM=mips64] IMAGE (choice) @@ -337,5 +316,5 @@ @ "gcc_native" GNU C Compiler (native) @ "gcc_helenos" GNU C Compiler (experimental HelenOS-specific cross-compiler) -! [PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32] COMPILER (choice) +! [PLATFORM=mips32|PLATFORM=ppc32] COMPILER (choice) % Compiler @@ -367,4 +346,10 @@ ! [PLATFORM=amd64] CONFIG_FENCES_P4 (y) +% IOMAP bitmap support +! [PLATFORM=ia32|PLATFORM=amd64] CONFIG_IOMAP_BITMAP (y) + +% IOMAP dummy support +! [PLATFORM=abs32le|PLATFORM=arm32|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc32|PLATFORM=sparc64] CONFIG_IOMAP_DUMMY (y) + % ACPI support ! [PLATFORM=ia32|PLATFORM=amd64] CONFIG_ACPI (y) @@ -374,14 +359,14 @@ % Page hash table support -! [PLATFORM=ia64|PLATFORM=mips64|PLATFORM=sparc64] CONFIG_PAGE_HT (y) +! [PLATFORM=ia64|PLATFORM=sparc64] CONFIG_PAGE_HT (y) % Software integer division support -! [PLATFORM=abs32le|PLATFORM=ia32|PLATFORM=arm32|PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc32] CONFIG_SOFTINT (y) +! [PLATFORM=abs32le|PLATFORM=ia32|PLATFORM=arm32|PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc32] CONFIG_SOFTINT (y) % ASID support -! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc32|PLATFORM=sparc64] CONFIG_ASID (y) +! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc32|PLATFORM=sparc64] CONFIG_ASID (y) % ASID FIFO support -! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc32|PLATFORM=sparc64] CONFIG_ASID_FIFO (y) +! [PLATFORM=ia64|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc32|PLATFORM=sparc64] CONFIG_ASID_FIFO (y) % OpenFirmware tree support @@ -396,4 +381,7 @@ % FPU support ! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=ia64|PLATFORM=sparc64] CONFIG_FPU (y) + +% FPU support +! [PLATFORM=ppc32] CONFIG_FPU (n/y) ## ARMv7 made FPU hardware compulsory @@ -408,5 +396,5 @@ % Support for SMP -! [(PLATFORM=ia32&PROCESSOR!=athlon_xp)|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ia64|(PLATFORM=mips32&MACHINE=msim)|(PLATFORM=mips64&MACHINE=msim)|PLATFORM=abs32le] CONFIG_SMP (y/n) +! [(PLATFORM=ia32&PROCESSOR!=athlon_xp)|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ia64|(PLATFORM=mips32&MACHINE=msim)|PLATFORM=abs32le] CONFIG_SMP (y/n) % Debug build @@ -465,5 +453,5 @@ @ "generic" Keyboard or serial line @ "none" No input device -! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=mips32|PLATFORM=mips64|PLATFORM=ppc32|PLATFORM=sparc64] CONFIG_HID_IN (choice) +! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=mips32|PLATFORM=ppc32|PLATFORM=sparc64] CONFIG_HID_IN (choice) % Input device class @@ -481,5 +469,5 @@ @ "generic" Monitor or serial line @ "none" No output device -! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&(MACHINE=msim|MACHINE=bmalta|MACHINE=lmalta))|(PLATFORM=mips64&MACHINE=msim)] CONFIG_HID_OUT (choice) +! [PLATFORM=ia32|PLATFORM=amd64|PLATFORM=sparc64|PLATFORM=ppc32|(PLATFORM=ia64&MACHINE=i460GX)|(PLATFORM=mips32&(MACHINE=msim|MACHINE=bmalta|MACHINE=lmalta))] CONFIG_HID_OUT (choice) % PC keyboard support Index: abi/include/abi/syscall.h =================================================================== --- abi/include/abi/syscall.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ abi/include/abi/syscall.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -74,6 +74,7 @@ SYS_IPC_CONNECT_KBOX, - SYS_EVENT_SUBSCRIBE, - SYS_EVENT_UNMASK, + SYS_IPC_EVENT_SUBSCRIBE, + SYS_IPC_EVENT_UNSUBSCRIBE, + SYS_IPC_EVENT_UNMASK, SYS_CAP_GRANT, @@ -87,6 +88,7 @@ SYS_IOSPACE_ENABLE, SYS_IOSPACE_DISABLE, - SYS_IRQ_REGISTER, - SYS_IRQ_UNREGISTER, + + SYS_IPC_IRQ_SUBSCRIBE, + SYS_IPC_IRQ_UNSUBSCRIBE, SYS_SYSINFO_GET_KEYS_SIZE, @@ -97,5 +99,5 @@ SYS_SYSINFO_GET_DATA, - SYS_DEBUG_ACTIVATE_CONSOLE, + SYS_DEBUG_CONSOLE, SYS_KLOG, Index: boot/Makefile.common =================================================================== --- boot/Makefile.common (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ boot/Makefile.common (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -127,9 +127,9 @@ RD_DRVS_ESSENTIAL = \ - infrastructure/root + root/root \ + root/virt \ + fb/kfb RD_DRVS_NON_ESSENTIAL = \ - infrastructure/rootvirt \ - fb/kfb \ test/test1 \ test/test2 \ @@ -218,5 +218,6 @@ $(USPACE_PATH)/app/vdemo/vdemo \ $(USPACE_PATH)/app/viewer/viewer \ - $(USPACE_PATH)/app/df/df + $(USPACE_PATH)/app/df/df \ + $(USPACE_PATH)/app/fontviewer/fontviewer COMPONENTS = \ Index: boot/arch/amd64/Makefile.inc =================================================================== --- boot/arch/amd64/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ boot/arch/amd64/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -35,5 +35,5 @@ RD_DRVS_ESSENTIAL += \ - infrastructure/rootpc \ + platform/pc \ block/ata_bd \ bus/pci/pciintel \ @@ -65,6 +65,6 @@ $(USPACE_PATH)/app/edit/edit \ $(USPACE_PATH)/app/mixerctl/mixerctl \ - $(USPACE_PATH)/app/wavplay/wavplay \ - + $(USPACE_PATH)/app/wavplay/wavplay + BOOT_OUTPUT = $(ROOT_PATH)/image.iso PREBUILD = $(INITRD).img Index: boot/arch/arm32/Makefile.inc =================================================================== --- boot/arch/arm32/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ boot/arch/arm32/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -60,12 +60,26 @@ ifeq ($(MACHINE), gta02) -RD_SRVS_ESSENTIAL += \ - $(USPACE_PATH)/srv/hid/s3c24xx_ts/s3c24xx_ts \ - $(USPACE_PATH)/srv/hw/char/s3c24xx_uart/s3c24ser + RD_SRVS_ESSENTIAL += \ + $(USPACE_PATH)/srv/hid/s3c24xx_ts/s3c24xx_ts \ + $(USPACE_PATH)/srv/hw/char/s3c24xx_uart/s3c24ser +endif + +ifeq ($(MACHINE), $(filter $(MACHINE),beagleboardxm beaglebone)) + RD_DRVS_ESSENTIAL += \ + platform/amdm37x \ + fb/amdm37x_dispc +endif + +ifeq ($(MACHINE), integratorcp) + RD_DRVS_ESSENTIAL += \ + char/pl050 \ + char/xtkbd \ + char/ps2mouse \ + platform/icp + RD_SRVS_ESSENTIAL += \ + $(USPACE_PATH)/srv/hw/irc/icp-ic/icp-ic endif RD_DRVS_ESSENTIAL += \ - infrastructure/rootamdm37x \ - fb/amdm37x_dispc \ bus/usb/ehci \ bus/usb/ohci \ Index: boot/arch/ia64/Makefile.inc =================================================================== --- boot/arch/ia64/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ boot/arch/ia64/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -66,5 +66,5 @@ RD_DRVS_ESSENTIAL += \ - infrastructure/rootpc \ + platform/pc \ bus/pci/pciintel \ bus/isa \ Index: boot/arch/mips32/Makefile.inc =================================================================== --- boot/arch/mips32/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ boot/arch/mips32/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -52,5 +52,5 @@ ifeq ($(MACHINE), $(filter $(MACHINE),bmalta lmalta)) RD_DRVS_ESSENTIAL += \ - infrastructure/rootmalta \ + platform/malta \ block/ata_bd \ bus/pci/pciintel \ Index: ot/arch/mips64/Makefile.inc =================================================================== --- boot/arch/mips64/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,52 +1,0 @@ -# -# Copyright (c) 2006 Martin Decky -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -BFD_ARCH = mips:4000 -BITS = 64 -EXTRA_CFLAGS = -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=64 - -ifeq ($(MACHINE),msim) - BFD_NAME = elf64-tradlittlemips - BFD_OUTPUT = binary - ENDIANESS = LE -endif - -SOURCES = \ - arch/$(BARCH)/src/asm.S \ - arch/$(BARCH)/src/main.c \ - arch/$(BARCH)/src/putchar.c \ - $(COMPS_C) \ - genarch/src/division.c \ - genarch/src/multiplication.c \ - generic/src/memstr.c \ - generic/src/printf_core.c \ - generic/src/vprintf.c \ - generic/src/printf.c \ - generic/src/str.c \ - generic/src/version.c \ - generic/src/inflate.c Index: ot/arch/mips64/_link.ld.in =================================================================== --- boot/arch/mips64/_link.ld.in (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,30 +1,0 @@ -OUTPUT_FORMAT(elf64-tradlittlemips) -ENTRY(start) - -SECTIONS { - . = 0xffffffffbfc00000; - .text : { - *(BOOTSTRAP); - *(.text); - } - .data : { - *(.data); /* initialized data */ - *(.rodata); - *(.rodata.*); - *(.sdata); - *(.reginfo); - *(.sbss); - *(.scommon); - *(.bss); /* uninitialized static variables */ - *(COMMON); /* global variables */ -[[COMPONENTS]] - } - - /DISCARD/ : { - *(.gnu.*); - *(.mdebug*); - *(.pdr); - *(.comment); - *(.note); - } -} Index: ot/arch/mips64/include/arch.h =================================================================== --- boot/arch/mips64/include/arch.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,52 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef BOOT_mips64_ARCH_H_ -#define BOOT_mips64_ARCH_H_ - -#define PAGE_WIDTH 14 -#define PAGE_SIZE (1 << PAGE_WIDTH) - -#define CPUMAP_OFFSET 0x00001000 -#define STACK_OFFSET 0x00002000 -#define BOOTINFO_OFFSET 0x00003000 -#define BOOT_OFFSET 0x00100000 -#define LOADER_OFFSET 0x1fc00000 - -#define MSIM_VIDEORAM_ADDRESS 0xffffffffb0000000 -#define MSIM_DORDER_ADDRESS 0xffffffffb0000100 - -#ifndef __ASM__ - #define PA2KA(addr) (((uintptr_t) (addr)) + 0xffffffff80000000) - #define KSEG2PA(addr) (((uintptr_t) (addr)) - 0xffffffffa0000000) -#else - #define PA2KA(addr) ((addr) + 0xffffffff80000000) - #define KSEG2PA(addr) ((addr) - 0xffffffffa0000000) -#endif - -#endif Index: ot/arch/mips64/include/asm.h =================================================================== --- boot/arch/mips64/include/asm.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/include/asm.h Index: ot/arch/mips64/include/main.h =================================================================== --- boot/arch/mips64/include/main.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/include/main.h Index: ot/arch/mips64/include/regname.h =================================================================== --- boot/arch/mips64/include/regname.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/include/regname.h Index: ot/arch/mips64/include/types.h =================================================================== --- boot/arch/mips64/include/types.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef BOOT_mips64_TYPES_H_ -#define BOOT_mips64_TYPES_H_ - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -typedef uint64_t size_t; -typedef uint64_t uintptr_t; - -typedef struct { - /** Address where the task was placed. */ - void *addr; - /** Size of the task's binary. */ - size_t size; - /** Task name. */ - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} task_t; - -typedef struct { - uint32_t cpumap; - size_t cnt; - task_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -#endif Index: ot/arch/mips64/src/asm.S =================================================================== --- boot/arch/mips64/src/asm.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,150 +1,0 @@ -# -# Copyright (c) 2006 Martin Decky -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -#include -#include - -.set noat -.set noreorder -.set nomacro - -.global start -.global halt -.global jump_to_kernel - -.section BOOTSTRAP - -start: - /* - * Setup the CP0 configuration - * - Enable 64-bit kernel addressing mode - * - Enable 64-bit supervisor adressing mode - * - Enable 64-bit user addressing mode - */ - mfc0 $a0, $status - ori $a0, 0x00e0 - mtc0 $a0, $status - - /* - * Setup CPU map (on msim this code - * is executed in parallel on all CPUs, - * but it not an issue). - */ - dla $a0, PA2KA(CPUMAP_OFFSET) - - sw $zero, 0($a0) - sw $zero, 4($a0) - sw $zero, 8($a0) - sw $zero, 12($a0) - - sw $zero, 16($a0) - sw $zero, 20($a0) - sw $zero, 24($a0) - sw $zero, 28($a0) - - sw $zero, 32($a0) - sw $zero, 36($a0) - sw $zero, 40($a0) - sw $zero, 44($a0) - - sw $zero, 48($a0) - sw $zero, 52($a0) - sw $zero, 56($a0) - sw $zero, 60($a0) - - sw $zero, 64($a0) - sw $zero, 68($a0) - sw $zero, 72($a0) - sw $zero, 76($a0) - - sw $zero, 80($a0) - sw $zero, 84($a0) - sw $zero, 88($a0) - sw $zero, 92($a0) - - sw $zero, 96($a0) - sw $zero, 100($a0) - sw $zero, 104($a0) - sw $zero, 108($a0) - - sw $zero, 112($a0) - sw $zero, 116($a0) - sw $zero, 120($a0) - sw $zero, 124($a0) - - lui $a1, 1 - -#ifdef MACHINE_msim - - /* Read dorder value */ - dla $k0, MSIM_DORDER_ADDRESS - lw $k1, ($k0) - - /* - * If we are not running on BSP - * then end in an infinite loop. - */ - beq $k1, $zero, bsp - nop - - /* Record CPU presence */ - sll $a2, $k1, 2 - addu $a2, $a2, $a0 - sw $a1, ($a2) - - loop: - j loop - nop - -#endif - - bsp: - /* Record CPU presence */ - sw $a1, ($a0) - - /* Setup initial stack */ - dla $sp, PA2KA(STACK_OFFSET) - - j bootstrap - nop - -.text - -halt: - j halt - nop - -jump_to_kernel: - /* - * TODO: - * - * Make sure that the I-cache, D-cache and memory are mutually - * coherent before passing control to the copied code. - */ - j $a0 - nop Index: ot/arch/mips64/src/main.c =================================================================== --- boot/arch/mips64/src/main.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,126 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define TOP2ADDR(top) (((void *) PA2KA(BOOT_OFFSET)) + (top)) - -static bootinfo_t *bootinfo = (bootinfo_t *) PA2KA(BOOTINFO_OFFSET); -static uint32_t *cpumap = (uint32_t *) PA2KA(CPUMAP_OFFSET); - -void bootstrap(void) -{ - version_print(); - - printf("\nMemory statistics\n"); - printf(" %p|%p: CPU map\n", (void *) PA2KA(CPUMAP_OFFSET), - (void *) CPUMAP_OFFSET); - printf(" %p|%p: bootstrap stack\n", (void *) PA2KA(STACK_OFFSET), - (void *) STACK_OFFSET); - printf(" %p|%p: boot info structure\n", - (void *) PA2KA(BOOTINFO_OFFSET), (void *) BOOTINFO_OFFSET); - printf(" %p|%p: kernel entry point\n", (void *) PA2KA(BOOT_OFFSET), - (void *) BOOT_OFFSET); - printf(" %p|%p: bootloader entry point\n", - (void *) PA2KA(LOADER_OFFSET), (void *) LOADER_OFFSET); - - size_t i; - for (i = 0; i < COMPONENTS; i++) - printf(" %p|%p: %s image (%zu/%zu bytes)\n", components[i].start, - (void *) KSEG2PA(components[i].start), components[i].name, - components[i].inflated, components[i].size); - - void *dest[COMPONENTS]; - size_t top = 0; - size_t cnt = 0; - bootinfo->cnt = 0; - for (i = 0; i < min(COMPONENTS, TASKMAP_MAX_RECORDS); i++) { - top = ALIGN_UP(top, PAGE_SIZE); - - if (i > 0) { - bootinfo->tasks[bootinfo->cnt].addr = TOP2ADDR(top); - bootinfo->tasks[bootinfo->cnt].size = components[i].inflated; - - str_cpy(bootinfo->tasks[bootinfo->cnt].name, - BOOTINFO_TASK_NAME_BUFLEN, components[i].name); - - bootinfo->cnt++; - } - - dest[i] = TOP2ADDR(top); - top += components[i].inflated; - cnt++; - } - - printf("\nInflating components ... "); - - for (i = cnt; i > 0; i--) { - void *tail = dest[i - 1] + components[i].inflated; - if (tail >= ((void *) PA2KA(LOADER_OFFSET))) { - printf("\n%s: Image too large to fit (%p >= %p), halting.\n", - components[i].name, tail, (void *) PA2KA(LOADER_OFFSET)); - halt(); - } - - printf("%s ", components[i - 1].name); - - int err = inflate(components[i - 1].start, components[i - 1].size, - dest[i - 1], components[i - 1].inflated); - - if (err != EOK) { - printf("\n%s: Inflating error %d, halting.\n", - components[i - 1].name, err); - halt(); - } - } - - printf(".\n"); - - printf("Copying CPU map ... \n"); - - bootinfo->cpumap = 0; - for (i = 0; i < CPUMAP_MAX_RECORDS; i++) { - if (cpumap[i] != 0) - bootinfo->cpumap |= (1 << i); - } - - printf("Booting the kernel ... \n"); - jump_to_kernel((void *) PA2KA(BOOT_OFFSET), bootinfo); -} Index: ot/arch/mips64/src/putchar.c =================================================================== --- boot/arch/mips64/src/putchar.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,40 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include - -void putchar(const wchar_t ch) -{ - if (ascii_check(ch)) - *((char *) MSIM_VIDEORAM_ADDRESS) = ch; - else - *((char *) MSIM_VIDEORAM_ADDRESS) = U_SPECIAL; -} Index: boot/arch/ppc32/Makefile.inc =================================================================== --- boot/arch/ppc32/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ boot/arch/ppc32/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -43,5 +43,5 @@ RD_DRVS_ESSENTIAL += \ - infrastructure/rootmac \ + platform/mac \ bus/pci/pciintel \ bus/usb/ohci \ Index: contrib/artwork/HelenOS-bw.svg =================================================================== --- contrib/artwork/HelenOS-bw.svg (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ contrib/artwork/HelenOS-bw.svg (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,290 @@ + + + +image/svg+xml Index: contrib/artwork/HelenOS.svg =================================================================== --- contrib/artwork/HelenOS.svg (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ contrib/artwork/HelenOS.svg (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,338 @@ + + + +image/svg+xml Index: contrib/qfs/qfs.sh =================================================================== --- contrib/qfs/qfs.sh (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ contrib/qfs/qfs.sh (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,80 @@ +#!/usr/bin/bash +# +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +VERSION=2.1.0 +BASENAME=qemu-${VERSION} +TARBALL=${BASENAME}.tar.bz2 +SOURCEDIR=${BASENAME} +URL=http://wiki.qemu-project.org/download/${TARBALL} +MD5="6726977292b448cbc7f89998fac6983b" + +if [ ! -f ${TARBALL} ]; +then + wget ${URL} +fi + +if [ `md5sum ${TARBALL} | cut -f 1 -d " "` != ${MD5} ]; +then + echo Wrong MD5 checksum + exit +fi + +tar xvfj ${TARBALL} + +cd ${SOURCEDIR} + +patch -p 1 <cp15.c1_coproc, 20, 2); ++ int fpen; ++ ++ if (arm_feature(env, ARM_FEATURE_V6)) { ++ fpen = extract32(env->cp15.c1_coproc, 20, 2); ++ } else { ++ /* CPACR doesn't exist before v6, so VFP is always accessible */ ++ fpen = 3; ++ } + + if (is_a64(env)) { + *pc = env->pc; +EOF + +./configure --target-list=i386-softmmu,x86_64-softmmu,arm-softmmu,ppc-softmmu,sparc-softmmu,sparc64-softmmu,mips-softmmu,mipsel-softmmu --audio-drv-list=pa + +make -j 4 + +sudo make install + Index: faults/mips64/Makefile.config =================================================================== --- defaults/mips64/Makefile.config (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,41 +1,0 @@ -# Platform -PLATFORM = mips64 - -# Ramdisk format -RDFMT = ext4fs - -# Compiler -COMPILER = gcc_cross - -# Debug build -CONFIG_DEBUG = y - -# Deadlock detection support for spinlocks -CONFIG_DEBUG_SPINLOCK = y - -# Support for SMP -CONFIG_SMP = y - -# Support for userspace debuggers -CONFIG_UDEBUG = y - -# Kernel console support -CONFIG_KCONSOLE = y - -# Kernel symbol information -CONFIG_SYMTAB = y - -# Detailed kernel logging -CONFIG_LOG = n - -# Kernel function tracing -CONFIG_TRACE = n - -# Compile kernel tests -CONFIG_TEST = y - -# Input device class -CONFIG_HID_IN = generic - -# Output device class -CONFIG_HID_OUT = generic Index: faults/mips64/msim/Makefile.config =================================================================== --- defaults/mips64/msim/Makefile.config (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,2 +1,0 @@ -# Machine type -MACHINE = msim Index: faults/mips64/output =================================================================== --- defaults/mips64/output (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -image.boot Index: defaults/ppc32/Makefile.config =================================================================== --- defaults/ppc32/Makefile.config (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ defaults/ppc32/Makefile.config (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -41,2 +41,4 @@ OHCI_POWER_SWITCH = ganged +# Barebone build with essential binaries only +CONFIG_BAREBONE = y Index: kernel/Makefile =================================================================== --- kernel/Makefile (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/Makefile (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -66,12 +66,12 @@ SIZEOK_MAP = generic/src/debug/sizeok_map.o -.PHONY: all clean +.PHONY: all clean autogen_clean all: $(VERSION_DEF) $(COMMON_MAKEFILE) $(COMMON_HEADER) $(CONFIG_MAKEFILE) $(CONFIG_HEADER) $(BIN) $(DISASM) -[ -f $(DEPEND) ] && cp -a $(DEPEND) $(DEPEND_PREV) -clean: +clean: autogen_clean rm -f $(DEPEND) $(DEPEND_PREV) $(RAW) $(BIN) $(MAP) $(JOB) $(MAP_PREV) $(DISASM) $(DUMP) $(REAL_MAP).* arch/*/_link.ld arch/*/include/arch/common.h - find generic/src/ arch/*/src/ genarch/src/ test/ -name '*.o' -follow -exec rm \{\} \; + find generic/src/ arch/*/src/ genarch/src/ test/ -name '*.o' -follow -exec rm '{}' \; ## Common compiler flags @@ -367,4 +367,8 @@ GENARCH_OBJECTS := $(addsuffix .o,$(basename $(GENARCH_SOURCES))) +ARCH_AUTOGENS_H := $(addsuffix .h,$(basename $(ARCH_AUTOGENS_AG))) +ARCH_AUTOGENS_PROBE_C := $(addsuffix .ag.probe.c,$(basename $(ARCH_AUTOGENS_AG))) +ARCH_AUTOGENS_PROBE_S := $(addsuffix .ag.probe.s,$(basename $(ARCH_AUTOGENS_AG))) + LFLAGS_LTO := $(addprefix -Xlinker ,$(LFLAGS)) @@ -397,4 +401,9 @@ $(LINK): $(LINK).in $(DEPEND) $(CC) $(DEFS) $(CFLAGS) -D__ASM__ -D__LINKER__ -E -x c $< | grep -v "^\#" > $@ + +%.h: %.ag + $(AUTOGEN) probe $< >$<.probe.c + $(CC) $(DEFS) $(CFLAGS) -S -o $<.probe.s $<.probe.c + $(AUTOGEN) generate $< <$<.probe.s >$@ %.o: %.S $(DEPEND) @@ -441,5 +450,5 @@ $(GENMAP) $(MAP_PREV) $(DUMP) $@ -$(DEPEND): $(COMMON_HEADER_ARCH) +$(DEPEND): $(COMMON_HEADER_ARCH) $(ARCH_AUTOGENS_H) makedepend -f - -- $(DEPEND_DEFS) $(CFLAGS) -- $(ARCH_SOURCES) $(GENARCH_SOURCES) $(GENERIC_SOURCES) > $@ 2> /dev/null -[ -f $(DEPEND_PREV) ] && diff -q $(DEPEND_PREV) $@ && mv -f $(DEPEND_PREV) $@ @@ -447,2 +456,5 @@ $(COMMON_HEADER_ARCH): $(COMMON_HEADER) ln -sfn ../../../../$< $@ + +autogen_clean: + -rm $(ARCH_AUTOGENS_H) $(ARCH_AUTOGENS_PROBE_C) $(ARCH_AUTOGENS_PROBE_S) Index: kernel/arch/abs32le/Makefile.inc =================================================================== --- kernel/arch/abs32le/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/abs32le/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -50,5 +50,4 @@ arch/$(KARCH)/src/userspace.c \ arch/$(KARCH)/src/cpu/cpu.c \ - arch/$(KARCH)/src/ddi/ddi.c \ arch/$(KARCH)/src/smp/smp.c \ arch/$(KARCH)/src/smp/ipi.c \ Index: rnel/arch/abs32le/src/ddi/ddi.c =================================================================== --- kernel/arch/abs32le/src/ddi/ddi.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2010 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup abs32leddi - * @{ - */ -/** @file - * @brief DDI. - */ - -#include -#include -#include - -/** Enable I/O space range for task. - * - */ -int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) -{ - return 0; -} - -/** @} - */ Index: kernel/arch/amd64/Makefile.inc =================================================================== --- kernel/arch/amd64/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/amd64/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -86,2 +86,7 @@ arch/$(KARCH)/src/smp/smp.c endif + +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag \ + arch/$(KARCH)/include/arch/context_struct.ag + Index: kernel/arch/amd64/include/arch/context.h =================================================================== --- kernel/arch/amd64/include/arch/context.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/amd64/include/arch/context.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -36,5 +36,5 @@ #define KERN_amd64_CONTEXT_H_ -#include +#include /* @@ -52,22 +52,4 @@ } while (0) -/* We include only registers that must be preserved - * during function call - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint64_t rbx; - uint64_t rbp; - - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; - - ipl_t ipl; -} __attribute__ ((packed)) context_t; - #endif Index: rnel/arch/amd64/include/arch/context_offset.h =================================================================== --- kernel/arch/amd64/include/arch/context_offset.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,79 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_amd64_CONTEXT_OFFSET_H_ -#define KERN_amd64_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x00 -#define OFFSET_PC 0x08 -#define OFFSET_RBX 0x10 -#define OFFSET_RBP 0x18 -#define OFFSET_R12 0x20 -#define OFFSET_R13 0x28 -#define OFFSET_R14 0x30 -#define OFFSET_R15 0x38 - -#ifdef KERNEL - #define OFFSET_IPL 0x40 -#else - #define OFFSET_TLS 0x40 -#endif - -#ifdef __ASM__ - -# ctx: address of the structure with saved context -# pc: return address -.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req - movq \pc, OFFSET_PC(\ctx) - movq %rsp, OFFSET_SP(\ctx) - - movq %rbx, OFFSET_RBX(\ctx) - movq %rbp, OFFSET_RBP(\ctx) - movq %r12, OFFSET_R12(\ctx) - movq %r13, OFFSET_R13(\ctx) - movq %r14, OFFSET_R14(\ctx) - movq %r15, OFFSET_R15(\ctx) -.endm - -# ctx: address of the structure with saved context -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req - movq OFFSET_R15(\ctx), %r15 - movq OFFSET_R14(\ctx), %r14 - movq OFFSET_R13(\ctx), %r13 - movq OFFSET_R12(\ctx), %r12 - movq OFFSET_RBP(\ctx), %rbp - movq OFFSET_RBX(\ctx), %rbx - - movq OFFSET_SP(\ctx), %rsp # ctx->sp -> %rsp - - movq OFFSET_PC(\ctx), \pc -.endm - -#endif - -#endif Index: kernel/arch/amd64/include/arch/context_struct.ag =================================================================== --- kernel/arch/amd64/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/amd64/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,83 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : context, + + includes : [ + { + include : + } + ], + + members : [ + # + # We include only registers that must be preserved + # during function call. + # + + { + name : sp, + type : uint64_t + }, + { + name : pc, + type : uint64_t + }, + + { + name : rbx, + type : uint64_t + }, + { + name : rbp, + type : uint64_t + }, + + { + name : r12, + type : uint64_t + }, + { + name : r13, + type : uint64_t + }, + { + name : r14, + type : uint64_t + }, + { + name : r15, + type : uint64_t + }, + + { + name : ipl, + type : ipl_t + } + ] +} Index: kernel/arch/amd64/include/arch/istate.h =================================================================== --- kernel/arch/amd64/include/arch/istate.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/amd64/include/arch/istate.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -38,31 +38,9 @@ #include -/** This is passed to interrupt handlers */ -typedef struct istate { - uint64_t rax; - uint64_t rbx; - uint64_t rcx; - uint64_t rdx; - uint64_t rsi; - uint64_t rdi; - uint64_t rbp; - uint64_t r8; - uint64_t r9; - uint64_t r10; - uint64_t r11; - uint64_t r12; - uint64_t r13; - uint64_t r14; - uint64_t r15; - uint64_t alignment; /* align rbp_frame on multiple of 16 */ - uint64_t rbp_frame; /* imitation of frame pointer linkage */ - uint64_t rip_frame; /* imitation of return address linkage */ - uint64_t error_word; /* real or fake error word */ - uint64_t rip; - uint64_t cs; - uint64_t rflags; - uint64_t rsp; /* only if istate_t is from uspace */ - uint64_t ss; /* only if istate_t is from uspace */ -} istate_t; +#ifdef KERNEL +#include +#else +#include +#endif #define RPL_USER 3 Index: kernel/arch/amd64/include/arch/istate_struct.ag =================================================================== --- kernel/arch/amd64/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/amd64/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,146 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + negative-guard: KERNEL, + include : + } + ], + + members : [ + { + name : rax, + type : uint64_t + }, + { + name : rbx, + type : uint64_t + }, + { + name : rcx, + type : uint64_t + }, + { + name : rdx, + type : uint64_t + }, + { + name : rsi, + type : uint64_t + }, + { + name : rdi, + type : uint64_t + }, + { + name : rbp, + type : uint64_t + }, + { + name : r8, + type : uint64_t + }, + { + name : r9, + type : uint64_t + }, + { + name : r10, + type : uint64_t + }, + { + name : r11, + type : uint64_t + }, + { + name : r12, + type : uint64_t + }, + { + name : r13, + type : uint64_t + }, + { + name : r14, + type : uint64_t + }, + { + name : r15, + type : uint64_t + }, + { + # align rbp_frame on multiple of 16 + name : alignment, + type : uint64_t + }, + { + # imitation of frame pointer linkage + name : rbp_frame, + type : uint64_t + }, + { + # imitation of frame address linkage + name : rip_frame, + type : uint64_t + }, + { + # real or fake error word + name : error_word, + type : uint64_t + }, + { + name : rip, + type : uint64_t + }, + { + name : cs, + type : uint64_t + }, + { + name : rflags, + type : uint64_t + }, + { + # only if istate_t is from uspace + name : rsp, + type : uint64_t + }, + { + # only if istate_t is from uspace + name : ss, + type : uint64_t + } + ] +} Index: kernel/arch/amd64/src/asm.S =================================================================== --- kernel/arch/amd64/src/asm.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/amd64/src/asm.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -29,4 +29,5 @@ #include #include +#include .text @@ -142,34 +143,9 @@ ret -#define ISTATE_OFFSET_RAX 0 -#define ISTATE_OFFSET_RBX 8 -#define ISTATE_OFFSET_RCX 16 -#define ISTATE_OFFSET_RDX 24 -#define ISTATE_OFFSET_RSI 32 -#define ISTATE_OFFSET_RDI 40 -#define ISTATE_OFFSET_RBP 48 -#define ISTATE_OFFSET_R8 56 -#define ISTATE_OFFSET_R9 64 -#define ISTATE_OFFSET_R10 72 -#define ISTATE_OFFSET_R11 80 -#define ISTATE_OFFSET_R12 88 -#define ISTATE_OFFSET_R13 96 -#define ISTATE_OFFSET_R14 104 -#define ISTATE_OFFSET_R15 112 -#define ISTATE_OFFSET_ALIGNMENT 120 -#define ISTATE_OFFSET_RBP_FRAME 128 -#define ISTATE_OFFSET_RIP_FRAME 136 -#define ISTATE_OFFSET_ERROR_WORD 144 -#define ISTATE_OFFSET_RIP 152 -#define ISTATE_OFFSET_CS 160 -#define ISTATE_OFFSET_RFLAGS 168 -#define ISTATE_OFFSET_RSP 176 -#define ISTATE_OFFSET_SS 184 - /* * Size of the istate structure without the hardware-saved part and without the * error word. */ -#define ISTATE_SOFT_SIZE 144 +#define ISTATE_SOFT_SIZE ISTATE_SIZE - (6 * 8) /** Index: kernel/arch/amd64/src/context.S =================================================================== --- kernel/arch/amd64/src/context.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/amd64/src/context.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -32,5 +32,5 @@ .global context_restore_arch -#include +#include ## Save current CPU context @@ -43,5 +43,13 @@ # 1st argument passed in %edi - CONTEXT_SAVE_ARCH_CORE %rdi %rdx + movq %rdx, CONTEXT_OFFSET_PC(%rdi) + movq %rsp, CONTEXT_OFFSET_SP(%rdi) + + movq %rbx, CONTEXT_OFFSET_RBX(%rdi) + movq %rbp, CONTEXT_OFFSET_RBP(%rdi) + movq %r12, CONTEXT_OFFSET_R12(%rdi) + movq %r13, CONTEXT_OFFSET_R13(%rdi) + movq %r14, CONTEXT_OFFSET_R14(%rdi) + movq %r15, CONTEXT_OFFSET_R15(%rdi) xorl %eax, %eax # context_save returns 1 @@ -56,5 +64,14 @@ # context_restore_arch: - CONTEXT_RESTORE_ARCH_CORE %rdi %rdx + movq CONTEXT_OFFSET_R15(%rdi), %r15 + movq CONTEXT_OFFSET_R14(%rdi), %r14 + movq CONTEXT_OFFSET_R13(%rdi), %r13 + movq CONTEXT_OFFSET_R12(%rdi), %r12 + movq CONTEXT_OFFSET_RBP(%rdi), %rbp + movq CONTEXT_OFFSET_RBX(%rdi), %rbx + + movq CONTEXT_OFFSET_SP(%rdi), %rsp # ctx->sp -> %rsp + + movq CONTEXT_OFFSET_PC(%rdi), %rdx movq %rdx, (%rsp) @@ -62,2 +79,3 @@ xorl %eax, %eax # context_restore returns 0 ret + Index: kernel/arch/amd64/src/ddi/ddi.c =================================================================== --- kernel/arch/amd64/src/ddi/ddi.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/amd64/src/ddi/ddi.c (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -45,67 +45,4 @@ #include #include - -/** Enable I/O space range for task. - * - * Interrupts are disabled and task is locked. - * - * @param task Task. - * @param ioaddr Startign I/O space address. - * @param size Size of the enabled I/O range. - * - * @return 0 on success or an error code from errno.h. - * - */ -int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) -{ - size_t elements = ioaddr + size; - if (elements > IO_PORTS) - return ENOENT; - - if (task->arch.iomap.elements < elements) { - /* - * The I/O permission bitmap is too small and needs to be grown. - */ - - void *store = malloc(bitmap_size(elements), FRAME_ATOMIC); - if (!store) - return ENOMEM; - - bitmap_t oldiomap; - bitmap_initialize(&oldiomap, task->arch.iomap.elements, - task->arch.iomap.bits); - - bitmap_initialize(&task->arch.iomap, elements, store); - - /* - * Mark the new range inaccessible. - */ - bitmap_set_range(&task->arch.iomap, oldiomap.elements, - elements - oldiomap.elements); - - /* - * In case there really existed smaller iomap, - * copy its contents and deallocate it. - */ - if (oldiomap.bits) { - bitmap_copy(&task->arch.iomap, &oldiomap, - oldiomap.elements); - - free(oldiomap.bits); - } - } - - /* - * Enable the range and we are done. - */ - bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, size); - - /* - * Increment I/O Permission bitmap generation counter. - */ - task->arch.iomapver++; - - return 0; -} /** Install I/O Permission bitmap. Index: kernel/arch/arm32/Makefile.inc =================================================================== --- kernel/arch/arm32/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/arm32/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -54,5 +54,4 @@ arch/$(KARCH)/src/dummy.S \ arch/$(KARCH)/src/cpu/cpu.c \ - arch/$(KARCH)/src/ddi/ddi.c \ arch/$(KARCH)/src/interrupt.c \ arch/$(KARCH)/src/exception.c \ @@ -96,2 +95,7 @@ ARCH_SOURCES += genarch/src/drivers/pl050/pl050.c endif + +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag \ + arch/$(KARCH)/include/arch/context_struct.ag + Index: kernel/arch/arm32/include/arch/context.h =================================================================== --- kernel/arch/arm32/include/arch/context.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/arm32/include/arch/context.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -39,4 +39,5 @@ #include #include +#include /* Put one item onto the stack to support get_stack_base() and align it up. */ @@ -52,27 +53,4 @@ #ifndef __ASM__ -#include - -/** Thread context containing registers that must be preserved across function - * calls. - */ -typedef struct { - uint32_t cpu_mode; - uintptr_t sp; - uintptr_t pc; - - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t fp; /* r11 */ - - ipl_t ipl; -} context_t; - - #endif /* __ASM__ */ Index: kernel/arch/arm32/include/arch/context_struct.ag =================================================================== --- kernel/arch/arm32/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/arm32/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,95 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : context, + + includes : [ + { + include : + }, + ], + + # + # Thread context containing registers that must be preserved across + # function calls. + # + members : [ + { + name : cpu_mode, + type : uint32_t + }, + { + name : sp, + type : uintptr_t + }, + { + name : pc, + type : uintptr_t + }, + + { + name : r4, + type : uint32_t + }, + { + name : r5, + type : uint32_t + }, + { + name : r6, + type : uint32_t + }, + { + name : r7, + type : uint32_t + }, + { + name : r8, + type : uint32_t + }, + { + name : r9, + type : uint32_t + }, + { + name : r10, + type : uint32_t + }, + { + # r11 + name : fp, + type : uint32_t + }, + + { + name : ipl, + type : ipl_t + } + ] +} + Index: kernel/arch/arm32/include/arch/istate.h =================================================================== --- kernel/arch/arm32/include/arch/istate.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/arm32/include/arch/istate.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -39,35 +39,13 @@ #ifdef KERNEL +#include #include #else /* KERNEL */ +#include #include #endif /* KERNEL */ - -/** Struct representing CPU state saved when an exception occurs. */ -typedef struct istate { - uint32_t dummy; - uint32_t spsr; - uint32_t sp; - uint32_t lr; - - uint32_t r0; - uint32_t r1; - uint32_t r2; - uint32_t r3; - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t fp; - uint32_t r12; - - uint32_t pc; -} istate_t; /** Set Program Counter member of given istate structure. Index: kernel/arch/arm32/include/arch/istate_struct.ag =================================================================== --- kernel/arch/arm32/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/arm32/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,119 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + negative-guard : KERNEL, + include : + } + ], + + members : [ + { + name : dummy, + type : uint32_t + }, + { + name : spsr, + type : uint32_t + }, + { + name : sp, + type : uint32_t + }, + { + name : lr, + type : uint32_t + }, + + { + name : r0, + type : uint32_t + }, + { + name : r1, + type : uint32_t + }, + { + name : r2, + type : uint32_t + }, + { + name : r3, + type : uint32_t + }, + { + name : r4, + type : uint32_t + }, + { + name : r5, + type : uint32_t + }, + { + name : r6, + type : uint32_t + }, + { + name : r7, + type : uint32_t + }, + { + name : r8, + type : uint32_t + }, + { + name : r9, + type : uint32_t + }, + { + name : r10, + type : uint32_t + }, + { + name : fp, + type : uint32_t + }, + { + name : r12, + type : uint32_t + }, + + { + name : pc, + type : uint32_t + } + ] +} + Index: rnel/arch/arm32/src/ddi/ddi.c =================================================================== --- kernel/arch/arm32/src/ddi/ddi.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,56 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup arm32ddi - * @{ - */ -/** @file - * @brief DDI. - */ - -#include -#include -#include - -/** Enable I/O space range for task. - * - * Interrupts are disabled and task is locked. - * - * @param task Task. - * @param ioaddr Startign I/O space address. - * @param size Size of the enabled I/O range. - * - * @return 0 on success or an error code from errno.h. - */ -int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) -{ - return 0; -} - -/** @} - */ Index: kernel/arch/ia32/Makefile.inc =================================================================== --- kernel/arch/ia32/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia32/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -105,2 +105,7 @@ arch/$(KARCH)/src/fpu_context.c \ arch/$(KARCH)/src/syscall.c + +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag \ + arch/$(KARCH)/include/arch/context_struct.ag + Index: kernel/arch/ia32/include/arch/context.h =================================================================== --- kernel/arch/ia32/include/arch/context.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia32/include/arch/context.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -37,4 +37,5 @@ #include +#include #define STACK_ITEM_SIZE 4 @@ -55,18 +56,4 @@ } while (0) -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - uint32_t ebx; - uint32_t esi; - uint32_t edi; - uint32_t ebp; - ipl_t ipl; -} __attribute__ ((packed)) context_t; - #endif Index: rnel/arch/ia32/include/arch/context_offset.h =================================================================== --- kernel/arch/ia32/include/arch/context_offset.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,81 +1,0 @@ -/* - * Copyright (c) 2008 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup ia32 - * @{ - */ -/** @file - */ - -#ifndef KERN_ia32_CONTEXT_OFFSET_H_ -#define KERN_ia32_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x00 -#define OFFSET_PC 0x04 -#define OFFSET_EBX 0x08 -#define OFFSET_ESI 0x0C -#define OFFSET_EDI 0x10 -#define OFFSET_EBP 0x14 - -#ifdef KERNEL - #define OFFSET_IPL 0x18 -#else - #define OFFSET_TLS 0x18 -#endif - -#ifdef __ASM__ - -# ctx: address of the structure with saved context -# pc: return address - -.macro CONTEXT_SAVE_ARCH_CORE ctx:req pc:req - movl %esp,OFFSET_SP(\ctx) # %esp -> ctx->sp - movl \pc,OFFSET_PC(\ctx) # %eip -> ctx->pc - movl %ebx,OFFSET_EBX(\ctx) # %ebx -> ctx->ebx - movl %esi,OFFSET_ESI(\ctx) # %esi -> ctx->esi - movl %edi,OFFSET_EDI(\ctx) # %edi -> ctx->edi - movl %ebp,OFFSET_EBP(\ctx) # %ebp -> ctx->ebp -.endm - -# ctx: address of the structure with saved context - -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req pc:req - movl OFFSET_SP(\ctx),%esp # ctx->sp -> %esp - movl OFFSET_PC(\ctx),\pc # ctx->pc -> \pc - movl OFFSET_EBX(\ctx),%ebx # ctx->ebx -> %ebx - movl OFFSET_ESI(\ctx),%esi # ctx->esi -> %esi - movl OFFSET_EDI(\ctx),%edi # ctx->edi -> %edi - movl OFFSET_EBP(\ctx),%ebp # ctx->ebp -> %ebp -.endm - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: kernel/arch/ia32/include/arch/context_struct.ag =================================================================== --- kernel/arch/ia32/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/ia32/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,72 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : context, + + includes : [ + { + include : + } + ], + + members : [ + # + # Only save registers that must be preserved across function + # calls. + # + + { + name : sp, + type : uint32_t + }, + { + name : pc, + type : uint32_t + }, + { + name : ebx, + type : uint32_t + }, + { + name : esi, + type : uint32_t + }, + { + name : edi, + type : uint32_t + }, + { + name : ebp, + type : uint32_t + }, + { + name : ipl, + type : ipl_t + } + ] +} Index: kernel/arch/ia32/include/arch/istate.h =================================================================== --- kernel/arch/ia32/include/arch/istate.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia32/include/arch/istate.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -38,33 +38,9 @@ #include -typedef struct istate { - /* - * The strange order of the GPRs is given by the requirement to use the - * istate structure for both regular interrupts and exceptions as well - * as for syscall handlers which use this order as an optimization. - */ - uint32_t edx; - uint32_t ecx; - uint32_t ebx; - uint32_t esi; - uint32_t edi; - uint32_t ebp; - uint32_t eax; - - uint32_t ebp_frame; /* imitation of frame pointer linkage */ - uint32_t eip_frame; /* imitation of return address linkage */ - - uint32_t gs; - uint32_t fs; - uint32_t es; - uint32_t ds; - - uint32_t error_word; /* real or fake error word */ - uint32_t eip; - uint32_t cs; - uint32_t eflags; - uint32_t esp; /* only if istate_t is from uspace */ - uint32_t ss; /* only if istate_t is from uspace */ -} istate_t; +#ifdef KERNEL +#include +#else +#include +#endif /* KERNEL */ #define RPL_USER 3 Index: kernel/arch/ia32/include/arch/istate_struct.ag =================================================================== --- kernel/arch/ia32/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/ia32/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,135 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + negative-guard: KERNEL, + include : + } + ], + + members : [ + + # + # The strange order of the GPRs is given by the requirement to use the + # istate structure for both regular interrupts and exceptions as well + # as for syscall handlers which use this order as an optimization. + # + + { + name : edx, + type : uint32_t + }, + { + name : ecx, + type : uint32_t + }, + { + name : ebx, + type : uint32_t + }, + { + name : esi, + type : uint32_t + }, + { + name : edi, + type : uint32_t + }, + { + name : ebp, + type : uint32_t + }, + { + name : eax, + type : uint32_t + }, + + { + # imitation of frame pointer linkage + name : ebp_frame, + type : uint32_t + }, + { + # imitation of return address linkage + name : eip_frame, + type : uint32_t + }, + + { + name : gs, + type : uint32_t + }, + { + name : fs, + type : uint32_t + }, + { + name : es, + type : uint32_t + }, + { + name : ds, + type : uint32_t + }, + + { + # real or fake error word + name : error_word, + type : uint32_t + }, + { + name : eip, + type : uint32_t + }, + { + name : cs, + type : uint32_t + }, + { + name : eflags, + type : uint32_t + }, + { + # only if istate_t is from uspace + name : esp, + type : uint32_t + }, + { + # only if istate_t is from uspace + name : ss, + type : uint32_t + } + ] +} Index: kernel/arch/ia32/src/asm.S =================================================================== --- kernel/arch/ia32/src/asm.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia32/src/asm.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -34,4 +34,5 @@ #include #include +#include .text @@ -136,29 +137,9 @@ ret -#define ISTATE_OFFSET_EDX 0 -#define ISTATE_OFFSET_ECX 4 -#define ISTATE_OFFSET_EBX 8 -#define ISTATE_OFFSET_ESI 12 -#define ISTATE_OFFSET_EDI 16 -#define ISTATE_OFFSET_EBP 20 -#define ISTATE_OFFSET_EAX 24 -#define ISTATE_OFFSET_EBP_FRAME 28 -#define ISTATE_OFFSET_EIP_FRAME 32 -#define ISTATE_OFFSET_GS 36 -#define ISTATE_OFFSET_FS 40 -#define ISTATE_OFFSET_ES 44 -#define ISTATE_OFFSET_DS 48 -#define ISTATE_OFFSET_ERROR_WORD 52 -#define ISTATE_OFFSET_EIP 56 -#define ISTATE_OFFSET_CS 60 -#define ISTATE_OFFSET_EFLAGS 64 -#define ISTATE_OFFSET_ESP 68 -#define ISTATE_OFFSET_SS 72 - /* * Size of the istate structure without the hardware-saved part * and without the error word. */ -#define ISTATE_SOFT_SIZE 52 +#define ISTATE_SOFT_SIZE ISTATE_SIZE - (6 * 4) /* Index: kernel/arch/ia32/src/context.S =================================================================== --- kernel/arch/ia32/src/context.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia32/src/context.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -27,5 +27,5 @@ # -#include +#include .text @@ -41,11 +41,16 @@ # context_save_arch: - movl 0(%esp),%eax # save pc value into eax - movl 4(%esp),%edx # address of the context variable to save context to + movl 0(%esp), %eax # save pc value into eax + movl 4(%esp), %edx # address of the context variable to save context to - # save registers to given structure - CONTEXT_SAVE_ARCH_CORE %edx %eax + # save registers to given structure + movl %esp, CONTEXT_OFFSET_SP(%edx) # %esp -> ctx->sp + movl %eax, CONTEXT_OFFSET_PC(%edx) # %eip -> ctx->pc + movl %ebx, CONTEXT_OFFSET_EBX(%edx) # %ebx -> ctx->ebx + movl %esi, CONTEXT_OFFSET_ESI(%edx) # %esi -> ctx->esi + movl %edi, CONTEXT_OFFSET_EDI(%edx) # %edi -> ctx->edi + movl %ebp, CONTEXT_OFFSET_EBP(%edx) # %ebp -> ctx->ebp - xorl %eax,%eax # context_save returns 1 + xorl %eax, %eax # context_save returns 1 incl %eax ret @@ -58,10 +63,16 @@ # context_restore_arch: - movl 4(%esp),%eax # address of the context variable to restore context from + movl 4(%esp), %eax # address of the context variable to restore context from - # restore registers from given structure - CONTEXT_RESTORE_ARCH_CORE %eax %edx + # restore registers from given structure + movl CONTEXT_OFFSET_SP(%eax), %esp # ctx->sp -> %esp + movl CONTEXT_OFFSET_PC(%eax), %edx # ctx->pc -> \pc + movl CONTEXT_OFFSET_EBX(%eax), %ebx # ctx->ebx -> %ebx + movl CONTEXT_OFFSET_ESI(%eax), %esi # ctx->esi -> %esi + movl CONTEXT_OFFSET_EDI(%eax), %edi # ctx->edi -> %edi + movl CONTEXT_OFFSET_EBP(%eax), %ebp # ctx->ebp -> %ebp - movl %edx,0(%esp) # put saved pc on stack - xorl %eax,%eax # context_restore returns 0 + movl %edx, 0(%esp) # put saved pc on stack + xorl %eax, %eax # context_restore returns 0 ret + Index: kernel/arch/ia32/src/ddi/ddi.c =================================================================== --- kernel/arch/ia32/src/ddi/ddi.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia32/src/ddi/ddi.c (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -45,67 +45,4 @@ #include #include - -/** Enable I/O space range for task. - * - * Interrupts are disabled and task is locked. - * - * @param task Task. - * @param ioaddr Startign I/O space address. - * @param size Size of the enabled I/O range. - * - * @return 0 on success or an error code from errno.h. - * - */ -int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) -{ - size_t elements = ioaddr + size; - if (elements > IO_PORTS) - return ENOENT; - - if (task->arch.iomap.elements < elements) { - /* - * The I/O permission bitmap is too small and needs to be grown. - */ - - void *store = malloc(bitmap_size(elements), FRAME_ATOMIC); - if (!store) - return ENOMEM; - - bitmap_t oldiomap; - bitmap_initialize(&oldiomap, task->arch.iomap.elements, - task->arch.iomap.bits); - - bitmap_initialize(&task->arch.iomap, elements, store); - - /* - * Mark the new range inaccessible. - */ - bitmap_set_range(&task->arch.iomap, oldiomap.elements, - elements - oldiomap.elements); - - /* - * In case there really existed smaller iomap, - * copy its contents and deallocate it. - */ - if (oldiomap.bits) { - bitmap_copy(&task->arch.iomap, &oldiomap, - oldiomap.elements); - - free(oldiomap.bits); - } - } - - /* - * Enable the range and we are done. - */ - bitmap_clear_range(&task->arch.iomap, (size_t) ioaddr, size); - - /* - * Increment I/O Permission bitmap generation counter. - */ - task->arch.iomapver++; - - return 0; -} /** Install I/O Permission bitmap. Index: kernel/arch/ia64/Makefile.inc =================================================================== --- kernel/arch/ia64/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia64/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -72,2 +72,6 @@ BFD = binary endif + +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag + Index: kernel/arch/ia64/include/arch/istate.h =================================================================== --- kernel/arch/ia64/include/arch/istate.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia64/include/arch/istate.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -40,73 +40,13 @@ #ifdef KERNEL +#include #include #else /* KERNEL */ +#include #include #endif /* KERNEL */ - -typedef struct istate { - uint128_t f2; - uint128_t f3; - uint128_t f4; - uint128_t f5; - uint128_t f6; - uint128_t f7; - uint128_t f8; - uint128_t f9; - uint128_t f10; - uint128_t f11; - uint128_t f12; - uint128_t f13; - uint128_t f14; - uint128_t f15; - uint128_t f16; - uint128_t f17; - uint128_t f18; - uint128_t f19; - uint128_t f20; - uint128_t f21; - uint128_t f22; - uint128_t f23; - uint128_t f24; - uint128_t f25; - uint128_t f26; - uint128_t f27; - uint128_t f28; - uint128_t f29; - uint128_t f30; - uint128_t f31; - - uintptr_t ar_bsp; - uintptr_t ar_bspstore; - uintptr_t ar_bspstore_new; - uint64_t ar_rnat; - uint64_t ar_ifs; - uint64_t ar_pfs; - uint64_t ar_rsc; - uintptr_t cr_ifa; - cr_isr_t cr_isr; - uintptr_t cr_iipa; - psr_t cr_ipsr; - uintptr_t cr_iip; - uint64_t pr; - uintptr_t sp; - - /* - * The following variables are defined only for break_instruction - * handler. - */ - uint64_t in0; - uint64_t in1; - uint64_t in2; - uint64_t in3; - uint64_t in4; - uint64_t in5; - uint64_t in6; - - uint64_t alignment; -} istate_t; NO_TRACE static inline void istate_set_retaddr(istate_t *istate, Index: kernel/arch/ia64/include/arch/istate_struct.ag =================================================================== --- kernel/arch/ia64/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/ia64/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,263 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + guard : KERNEL, + include : + }, + { + negative-guard : KERNEL, + include : + }, + { + negative-guard : KERNEL, + include : + } + ], + + members : [ + { + name : f2, + type : uint128_t + }, + { + name : f3, + type : uint128_t + }, + { + name : f4, + type : uint128_t + }, + { + name : f5, + type : uint128_t + }, + { + name : f6, + type : uint128_t + }, + { + name : f7, + type : uint128_t + }, + { + name : f8, + type : uint128_t + }, + { + name : f9, + type : uint128_t + }, + { + name : f10, + type : uint128_t + }, + { + name : f11, + type : uint128_t + }, + { + name : f12, + type : uint128_t + }, + { + name : f13, + type : uint128_t + }, + { + name : f14, + type : uint128_t + }, + { + name : f15, + type : uint128_t + }, + { + name : f16, + type : uint128_t + }, + { + name : f17, + type : uint128_t + }, + { + name : f18, + type : uint128_t + }, + { + name : f19, + type : uint128_t + }, + { + name : f20, + type : uint128_t + }, + { + name : f21, + type : uint128_t + }, + { + name : f22, + type : uint128_t + }, + { + name : f23, + type : uint128_t + }, + { + name : f24, + type : uint128_t + }, + { + name : f25, + type : uint128_t + }, + { + name : f26, + type : uint128_t + }, + { + name : f27, + type : uint128_t + }, + { + name : f28, + type : uint128_t + }, + { + name : f29, + type : uint128_t + }, + { + name : f30, + type : uint128_t + }, + { + name : f31, + type : uint128_t + }, + + { + name : ar_bsp, + type : uintptr_t + }, + { + name : ar_bspstore, + type : uintptr_t + }, + { + name : ar_bspstore_new, + type : uintptr_t + }, + { + name : ar_rnat, + type : uint64_t + }, + { + name : ar_ifs, + type : uint64_t + }, + { + name : ar_pfs, + type : uint64_t + }, + { + name : ar_rsc, + type : uint64_t + }, + { + name : cr_ifa, + type : uintptr_t + }, + { + name : cr_isr, + type : cr_isr_t + }, + { + name : cr_iipa, + type : uintptr_t + }, + { + name : cr_ipsr, + type : psr_t + }, + { + name : cr_iip, + type : uintptr_t + }, + { + name : pr, + type : uint64_t + }, + { + name : sp, + type : uintptr_t + }, + + # + # The following variables are defined only for break_instruction + # handler. + # + { + name : in0, + type : uint64_t + }, + { + name : in1, + type : uint64_t + }, + { + name : in2, + type : uint64_t + }, + { + name : in3, + type : uint64_t + }, + { + name : in4, + type : uint64_t + }, + { + name : in5, + type : uint64_t + }, + { + name : in6, + type : uint64_t + } + ] +} + Index: kernel/arch/ia64/src/ddi/ddi.c =================================================================== --- kernel/arch/ia64/src/ddi/ddi.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia64/src/ddi/ddi.c (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -47,9 +47,9 @@ * Interrupts are disabled and task is locked. * - * @param task Task. - * @param ioaddr Starting I/O space address. - * @param size Size of the enabled I/O range. + * @param task Task. + * @param ioaddr Starting I/O space address. + * @param size Size of the enabled I/O range. * - * @return 0 on success or an error code from errno.h. + * @return EOK on success or an error code from errno.h. */ int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) @@ -72,5 +72,27 @@ bitmap_set_range(task->arch.iomap, iopage, size / 4); - return 0; + return EOK; +} + +/** Disable I/O space range for task. + * + * Interrupts are disabled and task is locked. + * + * @param task Task. + * @param ioaddr Starting I/O space address. + * @param size Size of the disabled I/O range. + * + * @return EOK on success or an error code from errno.h. + */ +int ddi_iospace_disable_arch(task_t *task, uintptr_t ioaddr, size_t size) +{ + if (!task->arch.iomap) + return EINVAL; + + uintptr_t iopage = ioaddr / PORTS_PER_PAGE; + size = ALIGN_UP(size + ioaddr - 4 * iopage, PORTS_PER_PAGE); + bitmap_clear_range(task->arch.iomap, iopage, size / 4); + + return EOK; } Index: kernel/arch/ia64/src/ivt.S =================================================================== --- kernel/arch/ia64/src/ivt.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/ia64/src/ivt.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -31,15 +31,10 @@ #include #include +#include #include -#define FRS_TO_SAVE 30 -#define STACK_ITEMS (21 + FRS_TO_SAVE * 2) -#define STACK_FRAME_SIZE ALIGN_UP((STACK_ITEMS * STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT) - -#if (STACK_ITEMS % 2 == 0) -# define STACK_FRAME_BIAS 8 -#else -# define STACK_FRAME_BIAS 16 -#endif +#define STACK_FRAME_SIZE ALIGN_UP(ISTATE_SIZE + STACK_SCRATCH_AREA_SIZE, STACK_ALIGNMENT) + +#define FLOAT_ITEM_SIZE (STACK_ITEM_SIZE * 2) /** Partitioning of bank 0 registers. */ @@ -120,9 +115,9 @@ mov r27 = ~PSR_DFH_MASK ;; and r26 = r25, r26 - and r24 = r24, r27;; - or r24 = r24, r26;; - mov psr.l = r24;; + and r24 = r24, r27 ;; + or r24 = r24, r26 ;; + mov psr.l = r24 ;; srlz.i - srlz.d;; + srlz.d ;; mov r24 = cr.iip @@ -161,6 +156,6 @@ (p4) mov r12 = R_KSTACK ;; - add r31 = -STACK_FRAME_BIAS, r12 ;; - add r12 = -STACK_FRAME_SIZE, r12 + add r12 = -STACK_FRAME_SIZE, r12 ;; + add r31 = STACK_SCRATCH_AREA_SIZE + ISTATE_OFFSET_IN6, r12 /* 4. save registers in bank 0 into memory stack */ @@ -179,22 +174,22 @@ */ -(p6) st8 [r31] = r38, -8 ;; /* save in6 */ -(p6) st8 [r31] = r37, -8 ;; /* save in5 */ -(p6) st8 [r31] = r36, -8 ;; /* save in4 */ -(p6) st8 [r31] = r35, -8 ;; /* save in3 */ -(p6) st8 [r31] = r34, -8 ;; /* save in2 */ -(p6) st8 [r31] = r33, -8 ;; /* save in1 */ -(p6) st8 [r31] = r32, -8 ;; /* save in0 */ -(p5) add r31 = -56, r31 ;; +(p6) st8 [r31] = r38, -STACK_ITEM_SIZE ;; /* save in6 */ +(p6) st8 [r31] = r37, -STACK_ITEM_SIZE ;; /* save in5 */ +(p6) st8 [r31] = r36, -STACK_ITEM_SIZE ;; /* save in4 */ +(p6) st8 [r31] = r35, -STACK_ITEM_SIZE ;; /* save in3 */ +(p6) st8 [r31] = r34, -STACK_ITEM_SIZE ;; /* save in2 */ +(p6) st8 [r31] = r33, -STACK_ITEM_SIZE ;; /* save in1 */ +(p6) st8 [r31] = r32, -STACK_ITEM_SIZE ;; /* save in0 */ +(p5) add r31 = -(7 * STACK_ITEM_SIZE), r31 ;; - st8 [r31] = r30, -8 ;; /* save old stack pointer */ - - st8 [r31] = r29, -8 ;; /* save predicate registers */ - - st8 [r31] = r24, -8 ;; /* save cr.iip */ - st8 [r31] = r25, -8 ;; /* save cr.ipsr */ - st8 [r31] = r26, -8 ;; /* save cr.iipa */ - st8 [r31] = r27, -8 ;; /* save cr.isr */ - st8 [r31] = r28, -8 ;; /* save cr.ifa */ + st8 [r31] = r30, -STACK_ITEM_SIZE ;; /* save old stack pointer */ + + st8 [r31] = r29, -STACK_ITEM_SIZE ;; /* save predicate registers */ + + st8 [r31] = r24, -STACK_ITEM_SIZE ;; /* save cr.iip */ + st8 [r31] = r25, -STACK_ITEM_SIZE ;; /* save cr.ipsr */ + st8 [r31] = r26, -STACK_ITEM_SIZE ;; /* save cr.iipa */ + st8 [r31] = r27, -STACK_ITEM_SIZE ;; /* save cr.isr */ + st8 [r31] = r28, -STACK_ITEM_SIZE ;; /* save cr.ifa */ /* 5. RSE switch from interrupted context */ @@ -204,7 +199,7 @@ mov r26 = cr.ifs - st8 [r31] = r24, -8 ;; /* save ar.rsc */ - st8 [r31] = r25, -8 ;; /* save ar.pfs */ - st8 [r31] = r26, -8 /* save ar.ifs */ + st8 [r31] = r24, -STACK_ITEM_SIZE ;; /* save ar.rsc */ + st8 [r31] = r25, -STACK_ITEM_SIZE ;; /* save ar.pfs */ + st8 [r31] = r26, -STACK_ITEM_SIZE /* save ar.ifs */ and r24 = ~(RSC_PL_MASK), r24 ;; @@ -231,8 +226,8 @@ mov r29 = ar.bsp - st8 [r31] = r27, -8 ;; /* save ar.rnat */ - st8 [r31] = r30, -8 ;; /* save new value written to ar.bspstore */ - st8 [r31] = r28, -8 ;; /* save ar.bspstore */ - st8 [r31] = r29, -8 /* save ar.bsp */ + st8 [r31] = r27, -STACK_ITEM_SIZE ;; /* save ar.rnat */ + st8 [r31] = r30, -STACK_ITEM_SIZE ;; /* save new value written to ar.bspstore */ + st8 [r31] = r28, -STACK_ITEM_SIZE ;; /* save ar.bspstore */ + st8 [r31] = r29, -STACK_ITEM_SIZE /* save ar.bsp */ mov ar.rsc = r24 /* restore RSE's setting + kernel privileges */ @@ -246,9 +241,9 @@ cover /* allocate zero size frame (step 1 (from Intel Docs)) */ - add r31 = (STACK_SCRATCH_AREA_SIZE + (FRS_TO_SAVE * 2 * 8)), r12 ;; - - ld8 r30 = [r31], +8 ;; /* load ar.bsp */ - ld8 r29 = [r31], +8 ;; /* load ar.bspstore */ - ld8 r28 = [r31], +8 ;; /* load ar.bspstore_new */ + add r31 = STACK_SCRATCH_AREA_SIZE + ISTATE_OFFSET_AR_BSP, r12 ;; + + ld8 r30 = [r31], +STACK_ITEM_SIZE ;; /* load ar.bsp */ + ld8 r29 = [r31], +STACK_ITEM_SIZE ;; /* load ar.bspstore */ + ld8 r28 = [r31], +STACK_ITEM_SIZE ;; /* load ar.bspstore_new */ sub r27 = r30 , r28 ;; /* calculate loadrs (step 2) */ shl r27 = r27, 16 @@ -261,8 +256,8 @@ loadrs /* (step 3) */ - ld8 r27 = [r31], +8 ;; /* load ar.rnat */ - ld8 r26 = [r31], +8 ;; /* load cr.ifs */ - ld8 r25 = [r31], +8 ;; /* load ar.pfs */ - ld8 r24 = [r31], +8 ;; /* load ar.rsc */ + ld8 r27 = [r31], +STACK_ITEM_SIZE ;; /* load ar.rnat */ + ld8 r26 = [r31], +STACK_ITEM_SIZE ;; /* load cr.ifs */ + ld8 r25 = [r31], +STACK_ITEM_SIZE ;; /* load ar.pfs */ + ld8 r24 = [r31], +STACK_ITEM_SIZE ;; /* load ar.rsc */ mov ar.bspstore = r29 ;; /* (step 4) */ @@ -275,9 +270,9 @@ /* 17. restore interruption state from memory stack */ - ld8 r28 = [r31], +8 ;; /* load cr.ifa */ - ld8 r27 = [r31], +8 ;; /* load cr.isr */ - ld8 r26 = [r31], +8 ;; /* load cr.iipa */ - ld8 r25 = [r31], +8 ;; /* load cr.ipsr */ - ld8 r24 = [r31], +8 ;; /* load cr.iip */ + ld8 r28 = [r31], +STACK_ITEM_SIZE ;; /* load cr.ifa */ + ld8 r27 = [r31], +STACK_ITEM_SIZE ;; /* load cr.isr */ + ld8 r26 = [r31], +STACK_ITEM_SIZE ;; /* load cr.iipa */ + ld8 r25 = [r31], +STACK_ITEM_SIZE ;; /* load cr.ipsr */ + ld8 r24 = [r31], +STACK_ITEM_SIZE ;; /* load cr.iip */ mov cr.iip = r24;; @@ -292,13 +287,13 @@ and r25 = r25, r27 and r24 = r24, r26 ;; - or r25 = r25, r24;; + or r25 = r25, r24 ;; mov cr.ipsr = r25 /* 18. restore predicate registers from memory stack */ - ld8 r29 = [r31], +8 ;; /* load predicate registers */ + ld8 r29 = [r31], +STACK_ITEM_SIZE ;; /* load predicate registers */ mov pr = r29 /* 19. return from interruption */ - ld8 r12 = [r31] /* load stack pointer */ + ld8 r12 = [r31] /* load stack pointer */ rfi ;; @@ -373,46 +368,46 @@ mov loc46 = r31 - add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12 - add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12 - add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12 - add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12 - add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12 - add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12 - add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12 - add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;; - - stf.spill [r26] = f2, 0x80 - stf.spill [r27] = f3, 0x80 - stf.spill [r28] = f4, 0x80 - stf.spill [r29] = f5, 0x80 - stf.spill [r30] = f6, 0x80 - stf.spill [r31] = f7, 0x80 ;; - - stf.spill [r24] = f8, 0x80 - stf.spill [r25] = f9, 0x80 - stf.spill [r26] = f10, 0x80 - stf.spill [r27] = f11, 0x80 - stf.spill [r28] = f12, 0x80 - stf.spill [r29] = f13, 0x80 - stf.spill [r30] = f14, 0x80 - stf.spill [r31] = f15, 0x80 ;; - - stf.spill [r24] = f16, 0x80 - stf.spill [r25] = f17, 0x80 - stf.spill [r26] = f18, 0x80 - stf.spill [r27] = f19, 0x80 - stf.spill [r28] = f20, 0x80 - stf.spill [r29] = f21, 0x80 - stf.spill [r30] = f22, 0x80 - stf.spill [r31] = f23, 0x80 ;; - - stf.spill [r24] = f24, 0x80 - stf.spill [r25] = f25, 0x80 - stf.spill [r26] = f26, 0x80 - stf.spill [r27] = f27, 0x80 - stf.spill [r28] = f28, 0x80 - stf.spill [r29] = f29, 0x80 - stf.spill [r30] = f30, 0x80 - stf.spill [r31] = f31, 0x80 ;; + add r24 = ISTATE_OFFSET_F8 + STACK_SCRATCH_AREA_SIZE, r12 + add r25 = ISTATE_OFFSET_F9 + STACK_SCRATCH_AREA_SIZE, r12 + add r26 = ISTATE_OFFSET_F2 + STACK_SCRATCH_AREA_SIZE, r12 + add r27 = ISTATE_OFFSET_F3 + STACK_SCRATCH_AREA_SIZE, r12 + add r28 = ISTATE_OFFSET_F4 + STACK_SCRATCH_AREA_SIZE, r12 + add r29 = ISTATE_OFFSET_F5 + STACK_SCRATCH_AREA_SIZE, r12 + add r30 = ISTATE_OFFSET_F6 + STACK_SCRATCH_AREA_SIZE, r12 + add r31 = ISTATE_OFFSET_F7 + STACK_SCRATCH_AREA_SIZE, r12 ;; + + stf.spill [r26] = f2, 8 * FLOAT_ITEM_SIZE + stf.spill [r27] = f3, 8 * FLOAT_ITEM_SIZE + stf.spill [r28] = f4, 8 * FLOAT_ITEM_SIZE + stf.spill [r29] = f5, 8 * FLOAT_ITEM_SIZE + stf.spill [r30] = f6, 8 * FLOAT_ITEM_SIZE + stf.spill [r31] = f7, 8 * FLOAT_ITEM_SIZE ;; + + stf.spill [r24] = f8, 8 * FLOAT_ITEM_SIZE + stf.spill [r25] = f9, 8 * FLOAT_ITEM_SIZE + stf.spill [r26] = f10, 8 * FLOAT_ITEM_SIZE + stf.spill [r27] = f11, 8 * FLOAT_ITEM_SIZE + stf.spill [r28] = f12, 8 * FLOAT_ITEM_SIZE + stf.spill [r29] = f13, 8 * FLOAT_ITEM_SIZE + stf.spill [r30] = f14, 8 * FLOAT_ITEM_SIZE + stf.spill [r31] = f15, 8 * FLOAT_ITEM_SIZE ;; + + stf.spill [r24] = f16, 8 * FLOAT_ITEM_SIZE + stf.spill [r25] = f17, 8 * FLOAT_ITEM_SIZE + stf.spill [r26] = f18, 8 * FLOAT_ITEM_SIZE + stf.spill [r27] = f19, 8 * FLOAT_ITEM_SIZE + stf.spill [r28] = f20, 8 * FLOAT_ITEM_SIZE + stf.spill [r29] = f21, 8 * FLOAT_ITEM_SIZE + stf.spill [r30] = f22, 8 * FLOAT_ITEM_SIZE + stf.spill [r31] = f23, 8 * FLOAT_ITEM_SIZE ;; + + stf.spill [r24] = f24 + stf.spill [r25] = f25 + stf.spill [r26] = f26 + stf.spill [r27] = f27 + stf.spill [r28] = f28 + stf.spill [r29] = f29 + stf.spill [r30] = f30 + stf.spill [r31] = f31 ;; mov loc47 = ar.fpsr /* preserve floating point status register */ @@ -442,46 +437,46 @@ /* 13. restore general and floating-point registers */ - add r24 = 96 + STACK_SCRATCH_AREA_SIZE, r12 - add r25 = 112 + STACK_SCRATCH_AREA_SIZE, r12 - add r26 = 0 + STACK_SCRATCH_AREA_SIZE, r12 - add r27 = 16 + STACK_SCRATCH_AREA_SIZE, r12 - add r28 = 32 + STACK_SCRATCH_AREA_SIZE, r12 - add r29 = 48 + STACK_SCRATCH_AREA_SIZE, r12 - add r30 = 64 + STACK_SCRATCH_AREA_SIZE, r12 - add r31 = 80 + STACK_SCRATCH_AREA_SIZE, r12 ;; - - ldf.fill f2 = [r26], 0x80 - ldf.fill f3 = [r27], 0x80 - ldf.fill f4 = [r28], 0x80 - ldf.fill f5 = [r29], 0x80 - ldf.fill f6 = [r30], 0x80 - ldf.fill f7 = [r31], 0x80 ;; - - ldf.fill f8 = [r24], 0x80 - ldf.fill f9 = [r25], 0x80 - ldf.fill f10 = [r26], 0x80 - ldf.fill f11 = [r27], 0x80 - ldf.fill f12 = [r28], 0x80 - ldf.fill f13 = [r29], 0x80 - ldf.fill f14 = [r30], 0x80 - ldf.fill f15 = [r31], 0x80 ;; - - ldf.fill f16 = [r24], 0x80 - ldf.fill f17 = [r25], 0x80 - ldf.fill f18 = [r26], 0x80 - ldf.fill f19 = [r27], 0x80 - ldf.fill f20 = [r28], 0x80 - ldf.fill f21 = [r29], 0x80 - ldf.fill f22 = [r30], 0x80 - ldf.fill f23 = [r31], 0x80 ;; - - ldf.fill f24 = [r24], 0x80 - ldf.fill f25 = [r25], 0x80 - ldf.fill f26 = [r26], 0x80 - ldf.fill f27 = [r27], 0x80 - ldf.fill f28 = [r28], 0x80 - ldf.fill f29 = [r29], 0x80 - ldf.fill f30 = [r30], 0x80 - ldf.fill f31 = [r31], 0x80 ;; + add r24 = ISTATE_OFFSET_F8 + STACK_SCRATCH_AREA_SIZE, r12 + add r25 = ISTATE_OFFSET_F9 + STACK_SCRATCH_AREA_SIZE, r12 + add r26 = ISTATE_OFFSET_F2 + STACK_SCRATCH_AREA_SIZE, r12 + add r27 = ISTATE_OFFSET_F3 + STACK_SCRATCH_AREA_SIZE, r12 + add r28 = ISTATE_OFFSET_F4 + STACK_SCRATCH_AREA_SIZE, r12 + add r29 = ISTATE_OFFSET_F5 + STACK_SCRATCH_AREA_SIZE, r12 + add r30 = ISTATE_OFFSET_F6 + STACK_SCRATCH_AREA_SIZE, r12 + add r31 = ISTATE_OFFSET_F7 + STACK_SCRATCH_AREA_SIZE, r12 ;; + + ldf.fill f2 = [r26], 8 * FLOAT_ITEM_SIZE + ldf.fill f3 = [r27], 8 * FLOAT_ITEM_SIZE + ldf.fill f4 = [r28], 8 * FLOAT_ITEM_SIZE + ldf.fill f5 = [r29], 8 * FLOAT_ITEM_SIZE + ldf.fill f6 = [r30], 8 * FLOAT_ITEM_SIZE + ldf.fill f7 = [r31], 8 * FLOAT_ITEM_SIZE ;; + + ldf.fill f8 = [r24], 8 * FLOAT_ITEM_SIZE + ldf.fill f9 = [r25], 8 * FLOAT_ITEM_SIZE + ldf.fill f10 = [r26],8 * FLOAT_ITEM_SIZE + ldf.fill f11 = [r27], 8 * FLOAT_ITEM_SIZE + ldf.fill f12 = [r28], 8 * FLOAT_ITEM_SIZE + ldf.fill f13 = [r29], 8 * FLOAT_ITEM_SIZE + ldf.fill f14 = [r30], 8 * FLOAT_ITEM_SIZE + ldf.fill f15 = [r31], 8 * FLOAT_ITEM_SIZE ;; + + ldf.fill f16 = [r24], 8 * FLOAT_ITEM_SIZE + ldf.fill f17 = [r25], 8 * FLOAT_ITEM_SIZE + ldf.fill f18 = [r26], 8 * FLOAT_ITEM_SIZE + ldf.fill f19 = [r27], 8 * FLOAT_ITEM_SIZE + ldf.fill f20 = [r28], 8 * FLOAT_ITEM_SIZE + ldf.fill f21 = [r29], 8 * FLOAT_ITEM_SIZE + ldf.fill f22 = [r30], 8 * FLOAT_ITEM_SIZE + ldf.fill f23 = [r31], 8 * FLOAT_ITEM_SIZE ;; + + ldf.fill f24 = [r24] + ldf.fill f25 = [r25] + ldf.fill f26 = [r26] + ldf.fill f27 = [r27] + ldf.fill f28 = [r28] + ldf.fill f29 = [r29] + ldf.fill f30 = [r30] + ldf.fill f31 = [r31] ;; mov r1 = loc17 Index: kernel/arch/mips32/Makefile.inc =================================================================== --- kernel/arch/mips32/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/mips32/Makefile.inc (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -70,5 +70,4 @@ arch/$(KARCH)/src/mm/as.c \ arch/$(KARCH)/src/fpu_context.c \ - arch/$(KARCH)/src/ddi/ddi.c \ arch/$(KARCH)/src/smp/smp.c \ arch/$(KARCH)/src/machine_func.c @@ -86,2 +85,6 @@ endif +ARCH_AUTOGENS_AG = \ + arch/$(KARCH)/include/arch/istate_struct.ag \ + arch/$(KARCH)/include/arch/context_struct.ag + Index: kernel/arch/mips32/include/arch/context.h =================================================================== --- kernel/arch/mips32/include/arch/context.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/mips32/include/arch/context.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -38,4 +38,6 @@ #include #include +#include +#include /* @@ -44,34 +46,6 @@ #define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) -#ifndef __ASM__ - -#include - #define context_set(ctx, pc, stack, size) \ context_set_generic(ctx, pc, stack, size) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t s8; - uint32_t gp; - - ipl_t ipl; -} context_t; - -#endif /* __ASM__ */ #endif Index: rnel/arch/mips32/include/arch/context_offset.h =================================================================== --- kernel/arch/mips32/include/arch/context_offset.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,188 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_mips32_CONTEXT_OFFSET_H_ -#define KERN_mips32_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x0 -#define OFFSET_PC 0x4 -#define OFFSET_S0 0x8 -#define OFFSET_S1 0xc -#define OFFSET_S2 0x10 -#define OFFSET_S3 0x14 -#define OFFSET_S4 0x18 -#define OFFSET_S5 0x1c -#define OFFSET_S6 0x20 -#define OFFSET_S7 0x24 -#define OFFSET_S8 0x28 -#define OFFSET_GP 0x2c - -#ifdef KERNEL -# define OFFSET_IPL 0x30 -#else -# define OFFSET_TLS 0x30 - -# define OFFSET_F20 0x34 -# define OFFSET_F21 0x38 -# define OFFSET_F22 0x3c -# define OFFSET_F23 0x40 -# define OFFSET_F24 0x44 -# define OFFSET_F25 0x48 -# define OFFSET_F26 0x4c -# define OFFSET_F27 0x50 -# define OFFSET_F28 0x54 -# define OFFSET_F29 0x58 -# define OFFSET_F30 0x5c -#endif /* KERNEL */ - -#ifdef __ASM__ - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - sw $s0, OFFSET_S0(\ctx) - sw $s1, OFFSET_S1(\ctx) - sw $s2, OFFSET_S2(\ctx) - sw $s3, OFFSET_S3(\ctx) - sw $s4, OFFSET_S4(\ctx) - sw $s5, OFFSET_S5(\ctx) - sw $s6, OFFSET_S6(\ctx) - sw $s7, OFFSET_S7(\ctx) - sw $s8, OFFSET_S8(\ctx) - sw $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - sw $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - mfc1 $t0, $20 - sw $t0, OFFSET_F20(\ctx) - - mfc1 $t0, $21 - sw $t0, OFFSET_F21(\ctx) - - mfc1 $t0, $22 - sw $t0, OFFSET_F22(\ctx) - - mfc1 $t0, $23 - sw $t0, OFFSET_F23(\ctx) - - mfc1 $t0, $24 - sw $t0, OFFSET_F24(\ctx) - - mfc1 $t0, $25 - sw $t0, OFFSET_F25(\ctx) - - mfc1 $t0, $26 - sw $t0, OFFSET_F26(\ctx) - - mfc1 $t0, $27 - sw $t0, OFFSET_F27(\ctx) - - mfc1 $t0, $28 - sw $t0, OFFSET_F28(\ctx) - - mfc1 $t0, $29 - sw $t0, OFFSET_F29(\ctx) - - mfc1 $t0, $30 - sw $t0, OFFSET_F30(\ctx) -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - sw $ra, OFFSET_PC(\ctx) - sw $sp, OFFSET_SP(\ctx) -.endm - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - lw $s0, OFFSET_S0(\ctx) - lw $s1, OFFSET_S1(\ctx) - lw $s2, OFFSET_S2(\ctx) - lw $s3, OFFSET_S3(\ctx) - lw $s4, OFFSET_S4(\ctx) - lw $s5, OFFSET_S5(\ctx) - lw $s6, OFFSET_S6(\ctx) - lw $s7, OFFSET_S7(\ctx) - lw $s8, OFFSET_S8(\ctx) - lw $gp, OFFSET_GP(\ctx) -#ifndef KERNEL - lw $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - lw $t0, OFFSET_F20(\ctx) - mtc1 $t0, $20 - - lw $t0, OFFSET_F21(\ctx) - mtc1 $t0, $21 - - lw $t0, OFFSET_F22(\ctx) - mtc1 $t0, $22 - - lw $t0, OFFSET_F23(\ctx) - mtc1 $t0, $23 - - lw $t0, OFFSET_F24(\ctx) - mtc1 $t0, $24 - - lw $t0, OFFSET_F25(\ctx) - mtc1 $t0, $25 - - lw $t0, OFFSET_F26(\ctx) - mtc1 $t0, $26 - - lw $t0, OFFSET_F27(\ctx) - mtc1 $t0, $27 - - lw $t0, OFFSET_F28(\ctx) - mtc1 $t0, $28 - - lw $t0, OFFSET_F29(\ctx) - mtc1 $t0, $29 - - lw $t0, OFFSET_F30(\ctx) - mtc1 $t0, $30 -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - lw $ra, OFFSET_PC(\ctx) - lw $sp, OFFSET_SP(\ctx) -.endm - -#endif /* __ASM__ */ - -#endif Index: kernel/arch/mips32/include/arch/context_struct.ag =================================================================== --- kernel/arch/mips32/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/mips32/include/arch/context_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,97 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : context, + + includes : [ + { + include : + } + ], + + members : [ + # + # Only save registers that must be preserved across function + # calls. + # + { + name : sp, + type : uint32_t + }, + { + name : pc, + type : uint32_t + }, + + { + name : s0, + type : uint32_t + }, + { + name : s1, + type : uint32_t + }, + { + name : s2, + type : uint32_t + }, + { + name : s3, + type : uint32_t + }, + { + name : s4, + type : uint32_t + }, + { + name : s5, + type : uint32_t + }, + { + name : s6, + type : uint32_t + }, + { + name : s7, + type : uint32_t + }, + { + name : s8, + type : uint32_t + }, + { + name : gp, + type : uint32_t + }, + + { + name : ipl, + type : ipl_t + } + ] +} Index: kernel/arch/mips32/include/arch/istate.h =================================================================== --- kernel/arch/mips32/include/arch/istate.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/mips32/include/arch/istate.h (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -41,56 +41,12 @@ #include +#include #else /* KERNEL */ #include +#include #endif /* KERNEL */ - -typedef struct istate { - /* - * The first seven registers are arranged so that the istate structure - * can be used both for exception handlers and for the syscall handler. - */ - uint32_t a0; /* arg1 */ - uint32_t a1; /* arg2 */ - uint32_t a2; /* arg3 */ - uint32_t a3; /* arg4 */ - uint32_t t0; /* arg5 */ - uint32_t t1; /* arg6 */ - uint32_t v0; /* arg7 */ - uint32_t v1; - uint32_t at; - uint32_t t2; - uint32_t t3; - uint32_t t4; - uint32_t t5; - uint32_t t6; - uint32_t t7; - uint32_t s0; - uint32_t s1; - uint32_t s2; - uint32_t s3; - uint32_t s4; - uint32_t s5; - uint32_t s6; - uint32_t s7; - uint32_t t8; - uint32_t t9; - uint32_t kt0; - uint32_t kt1; /* We use it as thread-local pointer */ - uint32_t gp; - uint32_t sp; - uint32_t s8; - uint32_t ra; - - uint32_t lo; - uint32_t hi; - - uint32_t status; /* cp0_status */ - uint32_t epc; /* cp0_epc */ - - uint32_t alignment; /* to make sizeof(istate_t) a multiple of 8 */ -} istate_t; NO_TRACE static inline void istate_set_retaddr(istate_t *istate, Index: kernel/arch/mips32/include/arch/istate_struct.ag =================================================================== --- kernel/arch/mips32/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) +++ kernel/arch/mips32/include/arch/istate_struct.ag (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -0,0 +1,207 @@ +# Copyright (c) 2014 Jakub Jermar +# All rights reserved. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# +# - Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# - Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# - The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR +# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, +# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +# + +{ + name : istate, + + includes : [ + { + guard : KERNEL, + include : + }, + { + negative-guard : KERNEL, + include : + } + ], + + members : [ + # + # The first seven registers are arranged so that the istate structure + # can be used both for exception handlers and for the syscall handler. + # + { + # arg1 + name : a0, + type : uint32_t + }, + { + # arg2 + name : a1, + type : uint32_t + }, + { + # arg3 + name : a2, + type : uint32_t + }, + { + # arg4 + name : a3, + type : uint32_t + }, + { + # arg5 + name : t0, + type : uint32_t + }, + { + # arg6 + name : t1, + type : uint32_t + }, + { + # arg7 + name : v0, + type : uint32_t + }, + { + name : v1, + type : uint32_t + }, + { + name : at, + type : uint32_t + }, + { + name : t2, + type : uint32_t + }, + { + name : t3, + type : uint32_t + }, + { + name : t4, + type : uint32_t + }, + { + name : t5, + type : uint32_t + }, + { + name : t6, + type : uint32_t + }, + { + name : t7, + type : uint32_t + }, + { + name : s0, + type : uint32_t + }, + { + name : s1, + type : uint32_t + }, + { + name : s2, + type : uint32_t + }, + { + name : s3, + type : uint32_t + }, + { + name : s4, + type : uint32_t + }, + { + name : s5, + type : uint32_t + }, + { + name : s6, + type : uint32_t + }, + { + name : s7, + type : uint32_t + }, + { + name : t8, + type : uint32_t + }, + { + name : t9, + type : uint32_t + }, + { + name : kt0, + type : uint32_t + }, + { + # We use it as thread-local pointer + name : kt1, + type : uint32_t + }, + { + name : gp, + type : uint32_t + }, + { + name : sp, + type : uint32_t + }, + { + name : s8, + type : uint32_t + }, + { + name : ra, + type : uint32_t + }, + + { + name : lo, + type : uint32_t + }, + { + name : hi, + type : uint32_t + }, + + { + # cp0_status + name : status, + type : uint32_t + }, + { + # cp0_epc + name : epc, + type : uint32_t + }, + + { + # to make sizeof(istate_t) a multiple of 8 */ + name : alignment, + type : uint32_t + } + + ] +} Index: kernel/arch/mips32/src/context.S =================================================================== --- kernel/arch/mips32/src/context.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/mips32/src/context.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -27,5 +27,5 @@ # -#include +#include .text @@ -39,5 +39,17 @@ context_save_arch: - CONTEXT_SAVE_ARCH_CORE $a0 + sw $s0, CONTEXT_OFFSET_S0($a0) + sw $s1, CONTEXT_OFFSET_S1($a0) + sw $s2, CONTEXT_OFFSET_S2($a0) + sw $s3, CONTEXT_OFFSET_S3($a0) + sw $s4, CONTEXT_OFFSET_S4($a0) + sw $s5, CONTEXT_OFFSET_S5($a0) + sw $s6, CONTEXT_OFFSET_S6($a0) + sw $s7, CONTEXT_OFFSET_S7($a0) + sw $s8, CONTEXT_OFFSET_S8($a0) + sw $gp, CONTEXT_OFFSET_GP($a0) + + sw $ra, CONTEXT_OFFSET_PC($a0) + sw $sp, CONTEXT_OFFSET_SP($a0) # context_save returns 1 @@ -46,5 +58,17 @@ context_restore_arch: - CONTEXT_RESTORE_ARCH_CORE $a0 + lw $s0, CONTEXT_OFFSET_S0($a0) + lw $s1, CONTEXT_OFFSET_S1($a0) + lw $s2, CONTEXT_OFFSET_S2($a0) + lw $s3, CONTEXT_OFFSET_S3($a0) + lw $s4, CONTEXT_OFFSET_S4($a0) + lw $s5, CONTEXT_OFFSET_S5($a0) + lw $s6, CONTEXT_OFFSET_S6($a0) + lw $s7, CONTEXT_OFFSET_S7($a0) + lw $s8, CONTEXT_OFFSET_S8($a0) + lw $gp, CONTEXT_OFFSET_GP($a0) + + lw $ra, CONTEXT_OFFSET_PC($a0) + lw $sp, CONTEXT_OFFSET_SP($a0) # context_restore returns 0 Index: rnel/arch/mips32/src/ddi/ddi.c =================================================================== --- kernel/arch/mips32/src/ddi/ddi.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,58 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips32ddi - * @{ - */ -/** @file - */ - -#include -#include -#include -#include -#include -#include - -/** Enable I/O space range for task. - * - * Interrupts are disabled and task is locked. - * - * @param task Task. - * @param ioaddr Startign I/O space address. - * @param size Size of the enabled I/O range. - * - * @return 0 on success or an error code from errno.h. - */ -int ddi_iospace_enable_arch(task_t *task, uintptr_t ioaddr, size_t size) -{ - return 0; -} - -/** @} - */ Index: kernel/arch/mips32/src/start.S =================================================================== --- kernel/arch/mips32/src/start.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ kernel/arch/mips32/src/start.S (revision 089901ee8ce49168ea8f8adca63057de93de5f95) @@ -30,6 +30,6 @@ #include #include -#include #include +#include .text @@ -51,43 +51,4 @@ #define REG_SAVE_MASK 0x1f -#define ISTATE_OFFSET_A0 0 -#define ISTATE_OFFSET_A1 4 -#define ISTATE_OFFSET_A2 8 -#define ISTATE_OFFSET_A3 12 -#define ISTATE_OFFSET_T0 16 -#define ISTATE_OFFSET_T1 20 -#define ISTATE_OFFSET_V0 24 -#define ISTATE_OFFSET_V1 28 -#define ISTATE_OFFSET_AT 32 -#define ISTATE_OFFSET_T2 36 -#define ISTATE_OFFSET_T3 40 -#define ISTATE_OFFSET_T4 44 -#define ISTATE_OFFSET_T5 48 -#define ISTATE_OFFSET_T6 52 -#define ISTATE_OFFSET_T7 56 -#define ISTATE_OFFSET_S0 60 -#define ISTATE_OFFSET_S1 64 -#define ISTATE_OFFSET_S2 68 -#define ISTATE_OFFSET_S3 72 -#define ISTATE_OFFSET_S4 76 -#define ISTATE_OFFSET_S5 80 -#define ISTATE_OFFSET_S6 84 -#define ISTATE_OFFSET_S7 88 -#define ISTATE_OFFSET_T8 92 -#define ISTATE_OFFSET_T9 96 -#define ISTATE_OFFSET_KT0 100 -#define ISTATE_OFFSET_KT1 104 -#define ISTATE_OFFSET_GP 108 -#define ISTATE_OFFSET_SP 112 -#define ISTATE_OFFSET_S8 116 -#define ISTATE_OFFSET_RA 120 -#define ISTATE_OFFSET_LO 124 -#define ISTATE_OFFSET_HI 128 -#define ISTATE_OFFSET_STATUS 132 -#define ISTATE_OFFSET_EPC 136 -#define ISTATE_OFFSET_ALIGNMENT 140 - -#define ISTATE_SOFT_SIZE 144 - /* * The fake ABI prologue is never executed and may not be part of the @@ -97,5 +58,5 @@ */ .macro FAKE_ABI_PROLOGUE - sub $sp, ISTATE_SOFT_SIZE + sub $sp, ISTATE_SIZE sw $ra, ISTATE_OFFSET_EPC($sp) .endm @@ -265,5 +226,5 @@ KERNEL_STACK_TO_K0 - sub $k0, ISTATE_SOFT_SIZE + sub $k0, ISTATE_SIZE sw $sp, ISTATE_OFFSET_SP($k0) move $sp, $k0 @@ -355,5 +316,5 @@ tlb_refill_handler: KERNEL_STACK_TO_K0 - sub $k0, ISTATE_SOFT_SIZE + sub $k0, ISTATE_SIZE REGISTERS_STORE_AND_EXC_RESET $k0 sw $sp, ISTATE_OFFSET_SP($k0) @@ -371,5 +332,5 @@ cache_error_handler: KERNEL_STACK_TO_K0 - sub $k0, ISTATE_SOFT_SIZE + sub $k0, ISTATE_SIZE REGISTERS_STORE_AND_EXC_RESET $k0 sw $sp, ISTATE_OFFSET_SP($k0) Index: rnel/arch/mips64/Makefile.inc =================================================================== --- kernel/arch/mips64/Makefile.inc (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,64 +1,0 @@ -# -# Copyright (c) 2005 Martin Decky -# All rights reserved. -# -# Redistribution and use in source and binary forms, with or without -# modification, are permitted provided that the following conditions -# are met: -# -# - Redistributions of source code must retain the above copyright -# notice, this list of conditions and the following disclaimer. -# - Redistributions in binary form must reproduce the above copyright -# notice, this list of conditions and the following disclaimer in the -# documentation and/or other materials provided with the distribution. -# - The name of the author may not be used to endorse or promote products -# derived from this software without specific prior written permission. -# -# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR -# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES -# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. -# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, -# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT -# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, -# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY -# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT -# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF -# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. -# - -BFD_ARCH = mips:4000 -BFD = binary -GCC_CFLAGS += -msoft-float -mno-abicalls -G 0 -fno-zero-initialized-in-bss -mips3 -mabi=64 -AFLAGS = -64 - -BITS = 64 - -## Accepted MACHINEs -# - -ifeq ($(MACHINE),msim) - BFD_NAME = elf64-tradlittlemips - ENDIANESS = LE -endif - -ARCH_SOURCES = \ - arch/$(KARCH)/src/start.S \ - arch/$(KARCH)/src/context.S \ - arch/$(KARCH)/src/mips64.c \ - arch/$(KARCH)/src/asm.S \ - arch/$(KARCH)/src/exception.c \ - arch/$(KARCH)/src/interrupt.c \ - arch/$(KARCH)/src/cache.c \ - arch/$(KARCH)/src/debugger.c \ - arch/$(KARCH)/src/cpu/cpu.c \ - arch/$(KARCH)/src/debug/stacktrace.c \ - arch/$(KARCH)/src/debug/stacktrace_asm.S \ - arch/$(KARCH)/src/mm/km.c \ - arch/$(KARCH)/src/mm/frame.c \ - arch/$(KARCH)/src/mm/page.c \ - arch/$(KARCH)/src/mm/tlb.c \ - arch/$(KARCH)/src/mm/as.c \ - arch/$(KARCH)/src/fpu_context.c \ - arch/$(KARCH)/src/ddi/ddi.c \ - arch/$(KARCH)/src/smp/dorder.c \ - arch/$(KARCH)/src/smp/smp.c Index: rnel/arch/mips64/_link.ld.in =================================================================== --- kernel/arch/mips64/_link.ld.in (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,57 +1,0 @@ -/* - * MIPS64 linker script - * - * kernel text - * kernel data - * - */ - -#undef mips -#define mips mips - -#define KERNEL_LOAD_ADDRESS 0xffffffff80100000 - -OUTPUT_ARCH(mips) -OUTPUT_FORMAT(elf64-tradlittlemips) -ENTRY(kernel_image_start) - -SECTIONS { - . = KERNEL_LOAD_ADDRESS; - .text : { - ktext_start = .; - *(.text); - ktext_end = .; - } - .data : { - kdata_start = .; - *(.data); /* initialized data */ - hardcoded_ktext_size = .; - LONG(ktext_end - ktext_start); - hardcoded_kdata_size = .; - LONG(kdata_end - kdata_start); - hardcoded_load_address = .; - LONG(KERNEL_LOAD_ADDRESS); - *(.rodata*); - *(.sdata); - *(.reginfo); - *(.sbss); - *(.scommon); - *(.bss); /* uninitialized static variables */ - *(COMMON); /* global variables */ - . = ALIGN(8); - symbol_table = .; - *(symtab.*); - } - _gp = . + 0x8000; - .lit8 : { *(.lit8) } - .lit4 : { *(.lit4) } - - kdata_end = .; - - /DISCARD/ : { - *(.mdebug*); - *(.pdr); - *(.comment); - *(.note); - } -} Index: rnel/arch/mips64/include/arch/arch.h =================================================================== --- kernel/arch/mips64/include/arch/arch.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,63 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ARCH_H_ -#define KERN_mips64_ARCH_H_ - -#include - -#define TASKMAP_MAX_RECORDS 32 -#define CPUMAP_MAX_RECORDS 32 -#define BOOTINFO_TASK_NAME_BUFLEN 32 - -extern size_t cpu_count; - -typedef struct { - void *addr; - size_t size; - char name[BOOTINFO_TASK_NAME_BUFLEN]; -} utask_t; - -typedef struct { - uint32_t cpumap; - size_t cnt; - utask_t tasks[TASKMAP_MAX_RECORDS]; -} bootinfo_t; - -extern void arch_pre_main(void *entry, bootinfo_t *bootinfo); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/asm.h =================================================================== --- kernel/arch/mips64/include/arch/asm.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,117 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ASM_H_ -#define KERN_mips64_ASM_H_ - -#include -#include -#include - -NO_TRACE static inline void cpu_sleep(void) -{ - /* - * Unfortunatelly most of the simulators do not support - * - * asm volatile ( - * "wait" - * ); - * - */ -} - -/** Return base address of current stack - * - * Return the base address of the current stack. - * The stack is assumed to be STACK_SIZE bytes long. - * The stack must start on page boundary. - * - */ -NO_TRACE static inline uintptr_t get_stack_base(void) -{ - uintptr_t base; - - asm volatile ( - "and %[base], $29, %[mask]\n" - : [base] "=r" (base) - : [mask] "r" (~(STACK_SIZE - 1)) - ); - - return base; -} - -NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v) -{ - *port = v; -} - -NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v) -{ - *port = v; -} - -NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) -{ - return *port; -} - -NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) -{ - return *port; -} - -NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) -{ - return *port; -} - -extern void cpu_halt(void) __attribute__((noreturn)); -extern void asm_delay_loop(uint32_t); -extern void userspace_asm(uintptr_t, uintptr_t, uintptr_t); - -extern ipl_t interrupts_disable(void); -extern ipl_t interrupts_enable(void); -extern void interrupts_restore(ipl_t); -extern ipl_t interrupts_read(void); -extern bool interrupts_disabled(void); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/asm/boot.h =================================================================== --- kernel/arch/mips64/include/arch/asm/boot.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,44 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_BOOT_H_ -#define KERN_mips64_BOOT_H_ - -/* Temporary stack size for boot process */ -#define TEMP_STACK_SIZE 0x100 - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/asm/regname.h =================================================================== --- kernel/arch/mips64/include/arch/asm/regname.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,97 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_REGNAME_H_ -#define KERN_mips64_REGNAME_H_ - -#define zero 0 -#define at 1 -#define v0 2 -#define v1 3 -#define a0 4 -#define a1 5 -#define a2 6 -#define a3 7 -#define t0 8 -#define t1 9 -#define t2 10 -#define t3 11 -#define t4 12 -#define t5 13 -#define t6 14 -#define t7 15 -#define s0 16 -#define s1 17 -#define s2 18 -#define s3 19 -#define s4 20 -#define s5 21 -#define s6 22 -#define s7 23 -#define t8 24 -#define t9 25 -#define k0 26 -#define k1 27 -#define gp 28 -#define sp 29 -#define s8 30 -#define ra 31 - -#define rindex 0 -#define rrandom 1 -#define entrylo0 2 -#define entrylo1 3 -#define context 4 -#define pagemask 5 -#define wired 6 -#define badvaddr 8 -#define count 9 -#define entryhi 10 -#define compare 11 -#define status 12 -#define cause 13 -#define epc 14 -#define rconfig 16 -#define lladdr 17 -#define watchlo 18 -#define watchhi 19 -#define xcontext 20 -#define rdebug 23 -#define depc 24 -#define eepc 30 - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/atomic.h =================================================================== --- kernel/arch/mips64/include/arch/atomic.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,114 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ATOMIC_H_ -#define KERN_mips64_ATOMIC_H_ - -#include - -#define atomic_inc(x) ((void) atomic_add(x, 1)) -#define atomic_dec(x) ((void) atomic_add(x, -1)) - -#define atomic_postinc(x) (atomic_add(x, 1) - 1) -#define atomic_postdec(x) (atomic_add(x, -1) + 1) - -#define atomic_preinc(x) atomic_add(x, 1) -#define atomic_predec(x) atomic_add(x, -1) - -/* Atomic addition of immediate value. - * - * @param val Memory location to which will be the immediate value added. - * @param i Signed immediate that will be added to *val. - * - * @return Value after addition. - * - */ -NO_TRACE static inline atomic_count_t atomic_add(atomic_t *val, - atomic_count_t i) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " lld %0, %1\n" - " daddu %0, %0, %3\n" /* same as daddi, but never traps on overflow */ - " move %2, %0\n" - " scd %0, %1\n" - " beq %0, %4, 1b\n" /* if the atomic operation failed, try again */ - " nop\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "r" (i), - "i" (0) - ); - - return v; -} - -NO_TRACE static inline atomic_count_t test_and_set(atomic_t *val) -{ - atomic_count_t tmp; - atomic_count_t v; - - asm volatile ( - "1:\n" - " lld %2, %1\n" - " bnez %2, 2f\n" - " dli %0, %3\n" - " scd %0, %1\n" - " beqz %0, 1b\n" - " nop\n" - "2:\n" - : "=&r" (tmp), - "+m" (val->count), - "=&r" (v) - : "i" (1) - ); - - return v; -} - -NO_TRACE static inline void atomic_lock_arch(atomic_t *val) -{ - do { - while (val->count); - } while (test_and_set(val)); -} - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/barrier.h =================================================================== --- kernel/arch/mips64/include/arch/barrier.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_BARRIER_H_ -#define KERN_mips64_BARRIER_H_ - -/* - * TODO: implement true MIPS memory barriers for macros below. - */ -#define CS_ENTER_BARRIER() asm volatile ("" ::: "memory") -#define CS_LEAVE_BARRIER() asm volatile ("" ::: "memory") - -#define memory_barrier() asm volatile ("" ::: "memory") -#define read_barrier() asm volatile ("" ::: "memory") -#define write_barrier() asm volatile ("" ::: "memory") - -#define smc_coherence(a) -#define smc_coherence_block(a, l) - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/cache.h =================================================================== --- kernel/arch/mips64/include/arch/cache.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CACHE_H_ -#define KERN_mips64_CACHE_H_ - -#include - -extern void cache_error(istate_t *); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/context.h =================================================================== --- kernel/arch/mips64/include/arch/context.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,80 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CONTEXT_H_ -#define KERN_mips64_CONTEXT_H_ - -#include -#include - -/* - * Put one item onto the stack to support get_stack_base() and align it up. - */ -#define SP_DELTA (ABI_STACK_FRAME + ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT)) - -#ifndef __ASM__ - -#include - -#define context_set(ctx, pc, stack, size) \ - context_set_generic(ctx, pc, stack, size) - -/* - * Only save registers that must be preserved across - * function calls. - */ -typedef struct { - uintptr_t sp; - uintptr_t pc; - - uint64_t s0; - uint64_t s1; - uint64_t s2; - uint64_t s3; - uint64_t s4; - uint64_t s5; - uint64_t s6; - uint64_t s7; - uint64_t s8; - uint64_t gp; - - ipl_t ipl; -} context_t; - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/context_offset.h =================================================================== --- kernel/arch/mips64/include/arch/context_offset.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,189 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef KERN_mips64_CONTEXT_OFFSET_H_ -#define KERN_mips64_CONTEXT_OFFSET_H_ - -#define OFFSET_SP 0x00 -#define OFFSET_PC 0x08 -#define OFFSET_S0 0x10 -#define OFFSET_S1 0x18 -#define OFFSET_S2 0x20 -#define OFFSET_S3 0x28 -#define OFFSET_S4 0x30 -#define OFFSET_S5 0x38 -#define OFFSET_S6 0x40 -#define OFFSET_S7 0x48 -#define OFFSET_S8 0x50 -#define OFFSET_GP 0x58 - -#ifdef KERNEL - #define OFFSET_IPL 0x60 -#else - #define OFFSET_TLS 0x60 - - #define OFFSET_F20 0x68 - #define OFFSET_F21 0x70 - #define OFFSET_F22 0x78 - #define OFFSET_F23 0x80 - #define OFFSET_F24 0x88 - #define OFFSET_F25 0x90 - #define OFFSET_F26 0x98 - #define OFFSET_F27 0xa0 - #define OFFSET_F28 0xa8 - #define OFFSET_F29 0xb0 - #define OFFSET_F30 0xb8 -#endif /* KERNEL */ - -#ifdef __ASM__ - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_SAVE_ARCH_CORE ctx:req - sd $s0, OFFSET_S0(\ctx) - sd $s1, OFFSET_S1(\ctx) - sd $s2, OFFSET_S2(\ctx) - sd $s3, OFFSET_S3(\ctx) - sd $s4, OFFSET_S4(\ctx) - sd $s5, OFFSET_S5(\ctx) - sd $s6, OFFSET_S6(\ctx) - sd $s7, OFFSET_S7(\ctx) - sd $s8, OFFSET_S8(\ctx) - sd $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - sd $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - dmfc1 $t0, $20 - sd $t0, OFFSET_F20(\ctx) - - dmfc1 $t0,$21 - sd $t0, OFFSET_F21(\ctx) - - dmfc1 $t0,$22 - sd $t0, OFFSET_F22(\ctx) - - dmfc1 $t0,$23 - sd $t0, OFFSET_F23(\ctx) - - dmfc1 $t0,$24 - sd $t0, OFFSET_F24(\ctx) - - dmfc1 $t0,$25 - sd $t0, OFFSET_F25(\ctx) - - dmfc1 $t0,$26 - sd $t0, OFFSET_F26(\ctx) - - dmfc1 $t0,$27 - sd $t0, OFFSET_F27(\ctx) - - dmfc1 $t0,$28 - sd $t0, OFFSET_F28(\ctx) - - dmfc1 $t0,$29 - sd $t0, OFFSET_F29(\ctx) - - dmfc1 $t0,$30 - sd $t0, OFFSET_F30(\ctx) -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - sd $ra, OFFSET_PC(\ctx) - sd $sp, OFFSET_SP(\ctx) -.endm - -/* ctx: address of the structure with saved context */ -.macro CONTEXT_RESTORE_ARCH_CORE ctx:req - ld $s0, OFFSET_S0(\ctx) - ld $s1, OFFSET_S1(\ctx) - ld $s2, OFFSET_S2(\ctx) - ld $s3, OFFSET_S3(\ctx) - ld $s4, OFFSET_S4(\ctx) - ld $s5, OFFSET_S5(\ctx) - ld $s6, OFFSET_S6(\ctx) - ld $s7, OFFSET_S7(\ctx) - ld $s8, OFFSET_S8(\ctx) - ld $gp, OFFSET_GP(\ctx) - -#ifndef KERNEL - ld $k1, OFFSET_TLS(\ctx) - -#ifdef CONFIG_FPU - ld $t0, OFFSET_F20(\ctx) - dmtc1 $t0,$20 - - ld $t0, OFFSET_F21(\ctx) - dmtc1 $t0,$21 - - ld $t0, OFFSET_F22(\ctx) - dmtc1 $t0,$22 - - ld $t0, OFFSET_F23(\ctx) - dmtc1 $t0,$23 - - ld $t0, OFFSET_F24(\ctx) - dmtc1 $t0,$24 - - ld $t0, OFFSET_F25(\ctx) - dmtc1 $t0,$25 - - ld $t0, OFFSET_F26(\ctx) - dmtc1 $t0,$26 - - ld $t0, OFFSET_F27(\ctx) - dmtc1 $t0,$27 - - ld $t0, OFFSET_F28(\ctx) - dmtc1 $t0,$28 - - ld $t0, OFFSET_F29(\ctx) - dmtc1 $t0,$29 - - ld $t0, OFFSET_F30(\ctx) - dmtc1 $t0,$30 -#endif /* CONFIG_FPU */ -#endif /* KERNEL */ - - ld $ra, OFFSET_PC(\ctx) - ld $sp, OFFSET_SP(\ctx) -.endm - -#endif /* __ASM__ */ - -#endif Index: rnel/arch/mips64/include/arch/cp0.h =================================================================== --- kernel/arch/mips64/include/arch/cp0.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,133 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CP0_H_ -#define KERN_mips64_CP0_H_ - -#define cp0_status_ie_enabled_bit (1 << 0) -#define cp0_status_exl_exception_bit (1 << 1) -#define cp0_status_erl_error_bit (1 << 2) -#define cp0_status_um_bit (1 << 4) -#define cp0_status_bev_bootstrap_bit (1 << 22) -#define cp0_status_fpu_bit (1 << 29) - -#define cp0_status_im_shift 8 -#define cp0_status_im_mask 0xff00 - -#define cp0_cause_excno(cause) ((cause >> 2) & 0x1f) -#define cp0_cause_coperr(cause) ((cause >> 28) & 0x3) - -#define fpu_cop_id 1 - -/* - * Magic value for use in msim. - */ -#define cp0_compare_value 100000 - -#define cp0_mask_all_int() \ - cp0_status_write(cp0_status_read() & ~(cp0_status_im_mask)) - -#define cp0_unmask_all_int() \ - cp0_status_write(cp0_status_read() | cp0_status_im_mask) - -#define cp0_mask_int(it) \ - cp0_status_write(cp0_status_read() & ~(1 << (cp0_status_im_shift + (it)))) - -#define cp0_unmask_int(it) \ - cp0_status_write(cp0_status_read() | (1 << (cp0_status_im_shift + (it)))) - -#define GEN_READ_CP0(nm,reg) static inline uint64_t cp0_ ##nm##_read(void) \ - { \ - uint64_t retval; \ - asm volatile ( \ - "dmfc0 %0, $" #reg \ - : "=r" (retval) \ - ); \ - return retval; \ - } - -#define GEN_WRITE_CP0(nm,reg) static inline void cp0_ ##nm##_write(uint32_t val) \ - { \ - asm volatile ( \ - "dmtc0 %0, $" #reg \ - :: "r" (val) \ - ); \ - } - -GEN_READ_CP0(index, 0); -GEN_WRITE_CP0(index, 0); - -GEN_READ_CP0(random, 1); - -GEN_READ_CP0(entry_lo0, 2); -GEN_WRITE_CP0(entry_lo0, 2); - -GEN_READ_CP0(entry_lo1, 3); -GEN_WRITE_CP0(entry_lo1, 3); - -GEN_READ_CP0(context, 4); -GEN_WRITE_CP0(context, 4); - -GEN_READ_CP0(pagemask, 5); -GEN_WRITE_CP0(pagemask, 5); - -GEN_READ_CP0(wired, 6); -GEN_WRITE_CP0(wired, 6); - -GEN_READ_CP0(badvaddr, 8); - -GEN_READ_CP0(count, 9); -GEN_WRITE_CP0(count, 9); - -GEN_READ_CP0(entry_hi, 10); -GEN_WRITE_CP0(entry_hi, 10); - -GEN_READ_CP0(compare, 11); -GEN_WRITE_CP0(compare, 11); - -GEN_READ_CP0(status, 12); -GEN_WRITE_CP0(status, 12); - -GEN_READ_CP0(cause, 13); -GEN_WRITE_CP0(cause, 13); - -GEN_READ_CP0(epc, 14); -GEN_WRITE_CP0(epc, 14); - -GEN_READ_CP0(prid, 15); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/cpu.h =================================================================== --- kernel/arch/mips64/include/arch/cpu.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CPU_H_ -#define KERN_mips64_CPU_H_ - -#include -#include - -typedef struct { - uint32_t imp_num; - uint32_t rev_num; -} cpu_arch_t; - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/cycle.h =================================================================== --- kernel/arch/mips64/include/arch/cycle.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2006 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_CYCLE_H_ -#define KERN_mips64_CYCLE_H_ - -#include -#include -#include - -NO_TRACE static inline uint64_t get_cycle(void) -{ - return ((uint64_t) count_hi << 32) + ((uint64_t) cp0_count_read()); -} - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/debug.h =================================================================== --- kernel/arch/mips64/include/arch/debug.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,71 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_DEBUG_H_ -#define KERN_mips64_DEBUG_H_ - -/** Enter the simulator trace mode */ -#define ___traceon() \ - asm volatile ( \ - "\t.word\t0x39\n" \ - ); - -/** Leave the simulator trace mode */ -#define ___traceoff() \ - asm volatile ( \ - "\t.word\t0x3d\n" \ - ); - -/** Ask the simulator to dump registers */ -#define ___regview() \ - asm volatile ( \ - "\t.word\t0x37\n" \ - ); - -/** Halt the simulator */ -#define ___halt() \ - asm volatile ( \ - "\t.word\t0x28\n" \ - ); - -/** Enter the simulator interactive mode */ -#define ___intmode() \ - asm volatile ( \ - "\t.word\t0x29\n" \ - ); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/debugger.h =================================================================== --- kernel/arch/mips64/include/arch/debugger.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,78 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_DEBUGGER_H_ -#define KERN_mips64_DEBUGGER_H_ - -#include -#include - -#define BKPOINTS_MAX 10 - -/** Breakpoint was shot */ -#define BKPOINT_INPROG (1 << 0) - -/** One-time breakpoint, mandatory for j/b instructions */ -#define BKPOINT_ONESHOT (1 << 1) - -/** - * Breakpoint is set on the next instruction, so that it - * could be reinstalled on the previous one - */ -#define BKPOINT_REINST (1 << 2) - -/** Call a predefined function */ -#define BKPOINT_FUNCCALL (1 << 3) - - -typedef struct { - uintptr_t address; /**< Breakpoint address */ - sysarg_t instruction; /**< Original instruction */ - sysarg_t nextinstruction; /**< Original instruction following break */ - unsigned int flags; /**< Flags regarding breakpoint */ - size_t counter; - void (*bkfunc)(void *, istate_t *); -} bpinfo_t; - -extern bpinfo_t breakpoints[BKPOINTS_MAX]; - -extern bool is_jump(sysarg_t); - -extern void debugger_init(void); -extern void debugger_bpoint(istate_t *); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/drivers/msim.h =================================================================== --- kernel/arch/mips64/include/arch/drivers/msim.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2005 Ondrej Palkovsky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_MSIM_H_ -#define KERN_mips64_MSIM_H_ - -/** Address of devices. */ -#define MSIM_VIDEORAM 0xffffffff90000000 -#define MSIM_KBD_ADDRESS 0xffffffff90000000 -#define MSIM_KBD_IRQ 2 - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/elf.h =================================================================== --- kernel/arch/mips64/include/arch/elf.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,51 +1,0 @@ -/* - * Copyright (c) 2006 Sergey Bondari - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ELF_H_ -#define KERN_mips64_ELF_H_ - -#define ELF_MACHINE EM_MIPS - -#ifdef __BE__ - #define ELF_DATA_ENCODING ELFDATA2MSB -#else - #define ELF_DATA_ENCODING ELFDATA2LSB -#endif - -#define ELF_CLASS ELFCLASS64 - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/exception.h =================================================================== --- kernel/arch/mips64/include/arch/exception.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,69 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_EXCEPTION_H_ -#define KERN_mips64_EXCEPTION_H_ - -#include -#include - -#define EXC_Int 0 -#define EXC_Mod 1 -#define EXC_TLBL 2 -#define EXC_TLBS 3 -#define EXC_AdEL 4 -#define EXC_AdES 5 -#define EXC_IBE 6 -#define EXC_DBE 7 -#define EXC_Sys 8 -#define EXC_Bp 9 -#define EXC_RI 10 -#define EXC_CpU 11 -#define EXC_Ov 12 -#define EXC_Tr 13 -#define EXC_VCEI 14 -#define EXC_FPE 15 -#define EXC_WATCH 23 -#define EXC_VCED 31 - -extern void exception(istate_t *istate); -extern void tlb_refill_entry(void); -extern void exception_entry(void); -extern void cache_error_entry(void); -extern void exception_init(void); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/faddr.h =================================================================== --- kernel/arch/mips64/include/arch/faddr.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,45 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_FADDR_H_ -#define KERN_mips64_FADDR_H_ - -#include - -#define FADDR(fptr) ((uintptr_t) (fptr)) - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/fpu_context.h =================================================================== --- kernel/arch/mips64/include/arch/fpu_context.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,50 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Vana - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_FPU_CONTEXT_H_ -#define KERN_mips64_FPU_CONTEXT_H_ - -#include - -#define FPU_CONTEXT_ALIGN sizeof(sysarg_t) - -typedef struct { - sysarg_t dregs[32]; - sysarg_t cregs[32]; -} fpu_context_t; - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/interrupt.h =================================================================== --- kernel/arch/mips64/include/arch/interrupt.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_INTERRUPT_H_ -#define KERN_mips64_INTERRUPT_H_ - -#include -#include - -#define IVT_ITEMS 32 -#define IVT_FIRST 0 - -#define VECTOR_TLB_SHOOTDOWN_IPI EXC_Int - -extern function virtual_timer_fnc; -extern uint32_t count_hi; - -extern void interrupt_init(void); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/istate.h =================================================================== --- kernel/arch/mips64/include/arch/istate.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,119 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ISTATE_H_ -#define KERN_mips64_ISTATE_H_ - -#include - -#ifdef KERNEL - -#include - -#else /* KERNEL */ - -#include - -#endif /* KERNEL */ - -typedef struct istate { - /* - * The first seven registers are arranged so that the istate structure - * can be used both for exception handlers and for the syscall handler. - */ - uint64_t a0; /* arg1 */ - uint64_t a1; /* arg2 */ - uint64_t a2; /* arg3 */ - uint64_t a3; /* arg4 */ - uint64_t t0; /* arg5 */ - uint64_t t1; /* arg6 */ - uint64_t v0; /* arg7 */ - uint64_t v1; - uint64_t at; - uint64_t t2; - uint64_t t3; - uint64_t t4; - uint64_t t5; - uint64_t t6; - uint64_t t7; - uint64_t s0; - uint64_t s1; - uint64_t s2; - uint64_t s3; - uint64_t s4; - uint64_t s5; - uint64_t s6; - uint64_t s7; - uint64_t t8; - uint64_t t9; - uint64_t kt0; - uint64_t kt1; /* We use it as thread-local pointer */ - uint64_t gp; - uint64_t sp; - uint64_t s8; - uint64_t ra; - - uint64_t lo; - uint64_t hi; - - uint64_t status; /* cp0_status */ - uint64_t epc; /* cp0_epc */ -} istate_t; - -NO_TRACE static inline void istate_set_retaddr(istate_t *istate, - uintptr_t retaddr) -{ - istate->epc = retaddr; -} - -/** Return true if exception happened while in userspace */ -NO_TRACE static inline int istate_from_uspace(istate_t *istate) -{ - return istate->status & cp0_status_um_bit; -} - -NO_TRACE static inline uintptr_t istate_get_pc(istate_t *istate) -{ - return istate->epc; -} - -NO_TRACE static inline uintptr_t istate_get_fp(istate_t *istate) -{ - return istate->sp; -} - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/mm/as.h =================================================================== --- kernel/arch/mips64/include/arch/mm/as.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_AS_H_ -#define KERN_mips64_AS_H_ - -#define KERNEL_ADDRESS_SPACE_SHADOWED_ARCH 0 - -#define KERNEL_ADDRESS_SPACE_START_ARCH UINT64_C(0xffffffff80000000) -#define KERNEL_ADDRESS_SPACE_END_ARCH UINT64_C(0xffffffff9fffffff) -#define USER_ADDRESS_SPACE_START_ARCH UINT64_C(0x0000000000000000) -#define USER_ADDRESS_SPACE_END_ARCH UINT32_C(0x000000ffffffffff) - -typedef struct { -} as_arch_t; - -#include - -#define as_constructor_arch(as, flags) (as != as) -#define as_destructor_arch(as) (as != as) -#define as_create_arch(as, flags) (as != as) -#define as_deinstall_arch(as) -#define as_invalidate_translation_cache(as, page, cnt) - -extern void as_arch_init(void); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/mm/asid.h =================================================================== --- kernel/arch/mips64/include/arch/mm/asid.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2005 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_ASID_H_ -#define KERN_mips64_ASID_H_ - -#include - -#define ASID_MAX_ARCH 255 /* 2^8 - 1 */ - -typedef uint8_t asid_t; - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/mm/frame.h =================================================================== --- kernel/arch/mips64/include/arch/mm/frame.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,54 +1,0 @@ -/* - * Copyright (c) 2005 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_FRAME_H_ -#define KERN_mips64_FRAME_H_ - -#define FRAME_WIDTH 14 /* 16K */ -#define FRAME_SIZE (1 << FRAME_WIDTH) - -#define FRAME_LOWPRIO 0 - -#ifndef __ASM__ - -extern void frame_low_arch_init(void); -extern void frame_high_arch_init(void); -extern void physmem_print(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/mm/km.h =================================================================== --- kernel/arch/mips64/include/arch/mm/km.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2011 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_KM_H_ -#define KERN_mips64_KM_H_ - -#include - -extern void km_identity_arch_init(void); -extern void km_non_identity_arch_init(void); -extern bool km_is_non_identity_arch(uintptr_t); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/mm/page.h =================================================================== --- kernel/arch/mips64/include/arch/mm/page.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,61 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_PAGE_H_ -#define KERN_mips64_PAGE_H_ - -#include -#include - -#define PAGE_WIDTH FRAME_WIDTH -#define PAGE_SIZE FRAME_SIZE - -#ifndef __ASM__ - #define KA2PA(addr) (((uintptr_t) (addr)) - 0xffffffff80000000) - #define PA2KA(addr) (((uintptr_t) (addr)) + 0xffffffff80000000) -#else - #define KA2PA(addr) ((addr) - 0xffffffff80000000) - #define PA2KA(addr) ((addr) + 0xffffffff80000000) -#endif - -#ifndef __ASM__ - -extern void page_arch_init(void); - -#endif /* __ASM__ */ - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/mm/tlb.h =================================================================== --- kernel/arch/mips64/include/arch/mm/tlb.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,181 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64mm - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_TLB_H_ -#define KERN_mips64_TLB_H_ - -#include -#include -#include -#include - -#define TLB_ENTRY_COUNT 48 - -#define TLB_WIRED 1 -#define TLB_KSTACK_WIRED_INDEX 0 - -#define TLB_PAGE_MASK_4K (0x000 << 13) -#define TLB_PAGE_MASK_16K (0x003 << 13) -#define TLB_PAGE_MASK_64K (0x00f << 13) -#define TLB_PAGE_MASK_256K (0x03f << 13) -#define TLB_PAGE_MASK_1M (0x0ff << 13) -#define TLB_PAGE_MASK_4M (0x3ff << 13) -#define TLB_PAGE_MASK_16M (0xfff << 13) - -#define PAGE_UNCACHED 2 -#define PAGE_CACHEABLE_EXC_WRITE 5 - -typedef union { - struct { -#ifdef __BE__ - unsigned int : 2; /* zero */ - unsigned int pfn : 24; /* frame number */ - unsigned int c : 3; /* cache coherency attribute */ - unsigned int d : 1; /* dirty/write-protect bit */ - unsigned int v : 1; /* valid bit */ - unsigned int g : 1; /* global bit */ -#else - unsigned int g : 1; /* global bit */ - unsigned int v : 1; /* valid bit */ - unsigned int d : 1; /* dirty/write-protect bit */ - unsigned int c : 3; /* cache coherency attribute */ - unsigned int pfn : 24; /* frame number */ - unsigned int : 2; /* zero */ -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_lo_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned int vpn2 : 19; - unsigned int : 5; - unsigned int asid : 8; -#else - unsigned int asid : 8; - unsigned int : 5; - unsigned int vpn2 : 19; -#endif - } __attribute__ ((packed)); - uint32_t value; -} entry_hi_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned int : 7; - unsigned int mask : 12; - unsigned int : 13; -#else - unsigned int : 13; - unsigned int mask : 12; - unsigned int : 7; -#endif - } __attribute__ ((packed)); - uint32_t value; -} page_mask_t; - -typedef union { - struct { -#ifdef __BE__ - unsigned int p : 1; - unsigned int : 27; - unsigned int index : 4; -#else - unsigned int index : 4; - unsigned int : 27; - unsigned int p : 1; -#endif - } __attribute__ ((packed)); - uint32_t value; -} tlb_index_t; - -/** Probe TLB for Matching Entry - * - * Probe TLB for Matching Entry. - */ -NO_TRACE static inline void tlbp(void) -{ - asm volatile ( - "tlbp\n\t" - ); -} - -/** Read Indexed TLB Entry - * - * Read Indexed TLB Entry. - */ -NO_TRACE static inline void tlbr(void) -{ - asm volatile ( - "tlbr\n\t" - ); -} - -/** Write Indexed TLB Entry - * - * Write Indexed TLB Entry. - */ -NO_TRACE static inline void tlbwi(void) -{ - asm volatile ( - "tlbwi\n\t" - ); -} - -/** Write Random TLB Entry - * - * Write Random TLB Entry. - */ -NO_TRACE static inline void tlbwr(void) -{ - asm volatile ( - "tlbwr\n\t" - ); -} - -#define tlb_invalidate(asid) tlb_invalidate_asid(asid) - -extern void tlb_invalid(istate_t *); -extern void tlb_refill(istate_t *); -extern void tlb_modified(istate_t *); -extern void tlb_prepare_entry_lo(entry_lo_t *, bool, bool, bool, bool, - uintptr_t); -extern void tlb_prepare_entry_hi(entry_hi_t *, asid_t, uintptr_t); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/proc/task.h =================================================================== --- kernel/arch/mips64/include/arch/proc/task.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,47 +1,0 @@ -/* - * Copyright (c) 2006 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_TASK_H_ -#define KERN_mips64_TASK_H_ - -typedef struct { -} task_arch_t; - -#define task_create_arch(task) -#define task_destroy_arch(task) - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/proc/thread.h =================================================================== --- kernel/arch/mips64/include/arch/proc/thread.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,48 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64proc - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_THREAD_H_ -#define KERN_mips64_THREAD_H_ - -typedef struct { -} thread_arch_t; - -#define thr_constructor_arch(thread) -#define thr_destructor_arch(thread) -#define thread_create_arch(thread) - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/smp/dorder.h =================================================================== --- kernel/arch/mips64/include/arch/smp/dorder.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,46 +1,0 @@ -/* - * Copyright (c) 2007 Martin Decky - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_DORDER_H_ -#define KERN_mips64_DORDER_H_ - -#include - -extern uint32_t dorder_cpuid(void); -extern void dorder_ipi_ack(uint32_t); - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/stack.h =================================================================== --- kernel/arch/mips64/include/arch/stack.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,49 +1,0 @@ -/* - * Copyright (c) 2006 Josef Cejka - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_STACK_H_ -#define KERN_mips64_STACK_H_ - -#include - -#define MEM_STACK_SIZE STACK_SIZE - -#define STACK_ITEM_SIZE 8 -#define STACK_ALIGNMENT 8 -#define ABI_STACK_FRAME 64 - -#endif - -/** @} - */ Index: rnel/arch/mips64/include/arch/types.h =================================================================== --- kernel/arch/mips64/include/arch/types.h (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,64 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#ifndef KERN_mips64_TYPES_H_ -#define KERN_mips64_TYPES_H_ - -typedef uint64_t size_t; -typedef int64_t ssize_t; - -typedef uint64_t uintptr_t; -typedef uint64_t pfn_t; - -typedef uint64_t ipl_t; - -typedef uint64_t sysarg_t; -typedef int64_t native_t; -typedef uint64_t atomic_count_t; - -typedef struct { -} fncptr_t; - -#define INTN_C(c) INT64_C(c) -#define UINTN_C(c) UINT64_C(c) - -#define PRIdn PRId64 /**< Format for native_t. */ -#define PRIun PRIu64 /**< Format for sysarg_t. */ -#define PRIxn PRIx64 /**< Format for hexadecimal sysarg_t. */ -#define PRIua PRIu64 /**< Format for atomic_count_t. */ - -#endif - -/** @} - */ Index: rnel/arch/mips64/src/asm.S =================================================================== --- kernel/arch/mips64/src/asm.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,301 +1,0 @@ -/* - * Copyright (c) 2003 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include - -.text - -.macro cp0_read reg - dmfc0 $2, \reg - j $31 - nop -.endm - -.macro cp0_write reg - dmtc0 $4, \reg - j $31 - nop -.endm - -.set noat -.set noreorder -.set nomacro - -.global asm_delay_loop -asm_delay_loop: - j $31 - nop - -.global cpu_halt -cpu_halt: - j cpu_halt - nop - -.global memcpy_from_uspace -.global memcpy_to_uspace -.global memcpy_from_uspace_failover_address -.global memcpy_to_uspace_failover_address -memcpy_from_uspace: -memcpy_to_uspace: - move $t2, $a0 /* save dst */ - - addiu $v0, $a1, 3 - li $v1, -4 /* 0xfffffffffffffffc */ - and $v0, $v0, $v1 - beq $a1, $v0, 3f - move $t0, $a0 - - 0: - beq $a2, $zero, 2f - move $a3, $zero - - 1: - addu $v0, $a1, $a3 - lbu $a0, 0($v0) - addu $v1, $t0, $a3 - addiu $a3, $a3, 1 - bne $a3, $a2, 1b - sb $a0, 0($v1) - - 2: - jr $ra - move $v0, $t2 - - 3: - addiu $v0, $a0, 3 - and $v0, $v0, $v1 - bne $a0, $v0, 0b - srl $t1, $a2, 2 - - beq $t1, $zero, 5f - move $a3, $zero - - move $a3, $zero - move $a0, $zero - - 4: - addu $v0, $a1, $a0 - lw $v1, 0($v0) - addiu $a3, $a3, 1 - addu $v0, $t0, $a0 - sw $v1, 0($v0) - bne $a3, $t1, 4b - addiu $a0, $a0, 4 - - 5: - andi $a2, $a2, 0x3 - beq $a2, $zero, 2b - nop - - sll $v0, $a3, 2 - addu $t1, $v0, $t0 - move $a3, $zero - addu $t0, $v0, $a1 - - 6: - addu $v0, $t0, $a3 - lbu $a0, 0($v0) - addu $v1, $t1, $a3 - addiu $a3, $a3, 1 - bne $a3, $a2, 6b - sb $a0, 0($v1) - - jr $ra - move $v0, $t2 - -memcpy_from_uspace_failover_address: -memcpy_to_uspace_failover_address: - jr $ra - move $v0, $zero - -.macro fpu_gp_save reg ctx - mfc1 $t0, $\reg - sw $t0, \reg * 4(\ctx) -.endm - -.macro fpu_gp_restore reg ctx - lw $t0, \reg * 4(\ctx) - mtc1 $t0, $\reg -.endm - -.macro fpu_ct_save reg ctx - cfc1 $t0, $1 - sw $t0, (\reg + 32) * 4(\ctx) -.endm - -.macro fpu_ct_restore reg ctx - lw $t0, (\reg + 32) * 4(\ctx) - ctc1 $t0, $\reg -.endm - -.global fpu_context_save -fpu_context_save: -#ifdef CONFIG_FPU - fpu_gp_save 0, $a0 - fpu_gp_save 1, $a0 - fpu_gp_save 2, $a0 - fpu_gp_save 3, $a0 - fpu_gp_save 4, $a0 - fpu_gp_save 5, $a0 - fpu_gp_save 6, $a0 - fpu_gp_save 7, $a0 - fpu_gp_save 8, $a0 - fpu_gp_save 9, $a0 - fpu_gp_save 10, $a0 - fpu_gp_save 11, $a0 - fpu_gp_save 12, $a0 - fpu_gp_save 13, $a0 - fpu_gp_save 14, $a0 - fpu_gp_save 15, $a0 - fpu_gp_save 16, $a0 - fpu_gp_save 17, $a0 - fpu_gp_save 18, $a0 - fpu_gp_save 19, $a0 - fpu_gp_save 20, $a0 - fpu_gp_save 21, $a0 - fpu_gp_save 22, $a0 - fpu_gp_save 23, $a0 - fpu_gp_save 24, $a0 - fpu_gp_save 25, $a0 - fpu_gp_save 26, $a0 - fpu_gp_save 27, $a0 - fpu_gp_save 28, $a0 - fpu_gp_save 29, $a0 - fpu_gp_save 30, $a0 - fpu_gp_save 31, $a0 - - fpu_ct_save 1, $a0 - fpu_ct_save 2, $a0 - fpu_ct_save 3, $a0 - fpu_ct_save 4, $a0 - fpu_ct_save 5, $a0 - fpu_ct_save 6, $a0 - fpu_ct_save 7, $a0 - fpu_ct_save 8, $a0 - fpu_ct_save 9, $a0 - fpu_ct_save 10, $a0 - fpu_ct_save 11, $a0 - fpu_ct_save 12, $a0 - fpu_ct_save 13, $a0 - fpu_ct_save 14, $a0 - fpu_ct_save 15, $a0 - fpu_ct_save 16, $a0 - fpu_ct_save 17, $a0 - fpu_ct_save 18, $a0 - fpu_ct_save 19, $a0 - fpu_ct_save 20, $a0 - fpu_ct_save 21, $a0 - fpu_ct_save 22, $a0 - fpu_ct_save 23, $a0 - fpu_ct_save 24, $a0 - fpu_ct_save 25, $a0 - fpu_ct_save 26, $a0 - fpu_ct_save 27, $a0 - fpu_ct_save 28, $a0 - fpu_ct_save 29, $a0 - fpu_ct_save 30, $a0 - fpu_ct_save 31, $a0 -#endif - j $ra - nop - -.global fpu_context_restore -fpu_context_restore: -#ifdef CONFIG_FPU - fpu_gp_restore 0, $a0 - fpu_gp_restore 1, $a0 - fpu_gp_restore 2, $a0 - fpu_gp_restore 3, $a0 - fpu_gp_restore 4, $a0 - fpu_gp_restore 5, $a0 - fpu_gp_restore 6, $a0 - fpu_gp_restore 7, $a0 - fpu_gp_restore 8, $a0 - fpu_gp_restore 9, $a0 - fpu_gp_restore 10, $a0 - fpu_gp_restore 11, $a0 - fpu_gp_restore 12, $a0 - fpu_gp_restore 13, $a0 - fpu_gp_restore 14, $a0 - fpu_gp_restore 15, $a0 - fpu_gp_restore 16, $a0 - fpu_gp_restore 17, $a0 - fpu_gp_restore 18, $a0 - fpu_gp_restore 19, $a0 - fpu_gp_restore 20, $a0 - fpu_gp_restore 21, $a0 - fpu_gp_restore 22, $a0 - fpu_gp_restore 23, $a0 - fpu_gp_restore 24, $a0 - fpu_gp_restore 25, $a0 - fpu_gp_restore 26, $a0 - fpu_gp_restore 27, $a0 - fpu_gp_restore 28, $a0 - fpu_gp_restore 29, $a0 - fpu_gp_restore 30, $a0 - fpu_gp_restore 31, $a0 - - fpu_ct_restore 1, $a0 - fpu_ct_restore 2, $a0 - fpu_ct_restore 3, $a0 - fpu_ct_restore 4, $a0 - fpu_ct_restore 5, $a0 - fpu_ct_restore 6, $a0 - fpu_ct_restore 7, $a0 - fpu_ct_restore 8, $a0 - fpu_ct_restore 9, $a0 - fpu_ct_restore 10, $a0 - fpu_ct_restore 11, $a0 - fpu_ct_restore 12, $a0 - fpu_ct_restore 13, $a0 - fpu_ct_restore 14, $a0 - fpu_ct_restore 15, $a0 - fpu_ct_restore 16, $a0 - fpu_ct_restore 17, $a0 - fpu_ct_restore 18, $a0 - fpu_ct_restore 19, $a0 - fpu_ct_restore 20, $a0 - fpu_ct_restore 21, $a0 - fpu_ct_restore 22, $a0 - fpu_ct_restore 23, $a0 - fpu_ct_restore 24, $a0 - fpu_ct_restore 25, $a0 - fpu_ct_restore 26, $a0 - fpu_ct_restore 27, $a0 - fpu_ct_restore 28, $a0 - fpu_ct_restore 29, $a0 - fpu_ct_restore 30, $a0 - fpu_ct_restore 31, $a0 -#endif - j $ra - nop - -.global early_putchar -early_putchar: - j $ra - nop Index: rnel/arch/mips64/src/cache.c =================================================================== --- kernel/arch/mips64/src/cache.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/cache.c Index: rnel/arch/mips64/src/context.S =================================================================== --- kernel/arch/mips64/src/context.S (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/context.S Index: rnel/arch/mips64/src/cpu =================================================================== --- kernel/arch/mips64/src/cpu (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/cpu Index: rnel/arch/mips64/src/ddi =================================================================== --- kernel/arch/mips64/src/ddi (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/ddi Index: rnel/arch/mips64/src/debug =================================================================== --- kernel/arch/mips64/src/debug (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/debug Index: rnel/arch/mips64/src/debugger.c =================================================================== --- kernel/arch/mips64/src/debugger.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/debugger.c Index: rnel/arch/mips64/src/exception.c =================================================================== --- kernel/arch/mips64/src/exception.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,231 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static const char *exctable[] = { - "Interrupt", - "TLB Modified", - "TLB Invalid", - "TLB Invalid Store", - "Address Error - load/instr. fetch", - "Address Error - store", - "Bus Error - fetch instruction", - "Bus Error - data reference", - "Syscall", - "BreakPoint", - "Reserved Instruction", - "Coprocessor Unusable", - "Arithmetic Overflow", - "Trap", - "Virtual Coherency - instruction", - "Floating Point", - NULL, NULL, NULL, NULL, NULL, NULL, NULL, - "WatchHi/WatchLo", /* 23 */ - NULL, NULL, NULL, NULL, NULL, NULL, NULL, - "Virtual Coherency - data", -}; - -void istate_decode(istate_t *istate) -{ - printf("epc=%#018" PRIx64 "\tsta=%#018" PRIx64 "\t" - "lo =%#018" PRIx64 "\thi =%#018" PRIx64 "\n", - istate->epc, istate->status, istate->lo, istate->hi); - - printf("a0 =%#018" PRIx64 "\ta1 =%#018" PRIx64 "\t" - "a2 =%#018" PRIx64 "\ta3 =%#018" PRIx64 "\n", - istate->a0, istate->a1, istate->a2, istate->a3); - - printf("t0 =%#018" PRIx64 "\tt1 =%#018" PRIx64 "\t" - "t2 =%#018" PRIx64 "\tt3 =%#018" PRIx64 "\n", - istate->t0, istate->t1, istate->t2, istate->t3); - - printf("t4 =%#018" PRIx64 "\tt5 =%#018" PRIx64 "\t" - "t6 =%#018" PRIx64 "\tt7 =%#018" PRIx64 "\n", - istate->t4, istate->t5, istate->t6, istate->t7); - - printf("t8 =%#018" PRIx64 "\tt9 =%#018" PRIx64 "\t" - "v0 =%#018" PRIx64 "\tv1 =%#018" PRIx64 "\n", - istate->t8, istate->t9, istate->v0, istate->v1); - - printf("s0 =%#018" PRIx64 "\ts1 =%#018" PRIx64 "\t" - "s2 =%#018" PRIx64 "\ts3 =%#018" PRIx64 "\n", - istate->s0, istate->s1, istate->s2, istate->s3); - - printf("s4 =%#018" PRIx64 "\ts5 =%#018" PRIx64 "\t" - "s6 =%#018" PRIx64 "\ts7 =%#018" PRIx64 "\n", - istate->s4, istate->s5, istate->s6, istate->s7); - - printf("s8 =%#018" PRIx64 "\tat =%#018" PRIx64 "\t" - "kt0=%#018" PRIx64 "\tkt1=%#018" PRIx64 "\n", - istate->s8, istate->at, istate->kt0, istate->kt1); - - printf("sp =%#018" PRIx64 "\tra =%#018" PRIx64 "\t" - "gp =%#018" PRIx64 "\n", - istate->sp, istate->ra, istate->gp); -} - -static void unhandled_exception(unsigned int n, istate_t *istate) -{ - fault_if_from_uspace(istate, "Unhandled exception %s.", exctable[n]); - panic_badtrap(istate, n, "Unhandled exception %s.", exctable[n]); -} - -static void reserved_instr_exception(unsigned int n, istate_t *istate) -{ - if (*((uint32_t *) istate->epc) == 0x7c03e83b) { - ASSERT(THREAD); - istate->epc += 4; - istate->v1 = istate->kt1; - } else - unhandled_exception(n, istate); -} - -static void breakpoint_exception(unsigned int n, istate_t *istate) -{ -#ifdef CONFIG_DEBUG - debugger_bpoint(istate); -#else - /* it is necessary to not re-execute BREAK instruction after - returning from Exception handler - (see page 138 in R4000 Manual for more information) */ - istate->epc += 4; -#endif -} - -static void tlbmod_exception(unsigned int n, istate_t *istate) -{ - tlb_modified(istate); -} - -static void tlbinv_exception(unsigned int n, istate_t *istate) -{ - tlb_invalid(istate); -} - -#ifdef CONFIG_FPU_LAZY -static void cpuns_exception(unsigned int n, istate_t *istate) -{ - if (cp0_cause_coperr(cp0_cause_read()) == fpu_cop_id) - scheduler_fpu_lazy_request(); - else { - fault_if_from_uspace(istate, - "Unhandled Coprocessor Unusable Exception."); - panic_badtrap(istate, n, - "Unhandled Coprocessor Unusable Exception."); - } -} -#endif - -static void interrupt_exception(unsigned int n, istate_t *istate) -{ - /* Decode interrupt number and process the interrupt */ - uint32_t cause = (cp0_cause_read() >> 8) & 0xff; - - unsigned int i; - for (i = 0; i < 8; i++) { - if (cause & (1 << i)) { - irq_t *irq = irq_dispatch_and_lock(i); - if (irq) { - /* - * The IRQ handler was found. - */ - irq->handler(irq); - irq_spinlock_unlock(&irq->lock, false); - } else { - /* - * Spurious interrupt. - */ -#ifdef CONFIG_DEBUG - printf("cpu%u: spurious interrupt (inum=%u)\n", - CPU->id, i); -#endif - } - } - } -} - -/** Handle syscall userspace call */ -static void syscall_exception(unsigned int n, istate_t *istate) -{ - fault_if_from_uspace(istate, "Syscall is handled through shortcut."); -} - -void exception_init(void) -{ - unsigned int i; - - /* Clear exception table */ - for (i = 0; i < IVT_ITEMS; i++) - exc_register(i, "undef", false, - (iroutine_t) unhandled_exception); - - exc_register(EXC_Bp, "bkpoint", true, - (iroutine_t) breakpoint_exception); - exc_register(EXC_RI, "resinstr", true, - (iroutine_t) reserved_instr_exception); - exc_register(EXC_Mod, "tlb_mod", true, - (iroutine_t) tlbmod_exception); - exc_register(EXC_TLBL, "tlbinvl", true, - (iroutine_t) tlbinv_exception); - exc_register(EXC_TLBS, "tlbinvl", true, - (iroutine_t) tlbinv_exception); - exc_register(EXC_Int, "interrupt", true, - (iroutine_t) interrupt_exception); - -#ifdef CONFIG_FPU_LAZY - exc_register(EXC_CpU, "cpunus", true, - (iroutine_t) cpuns_exception); -#endif - - exc_register(EXC_Sys, "syscall", true, - (iroutine_t) syscall_exception); -} - -/** @} - */ Index: rnel/arch/mips64/src/fpu_context.c =================================================================== --- kernel/arch/mips64/src/fpu_context.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,1 +1,0 @@ -../../mips32/src/fpu_context.c Index: rnel/arch/mips64/src/interrupt.c =================================================================== --- kernel/arch/mips64/src/interrupt.c (revision de16f892e37393d27d9d32f487cc511dc31bbd38) +++ (revision ) @@ -1,189 +1,0 @@ -/* - * Copyright (c) 2003-2004 Jakub Jermar - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * - Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * - Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * - The name of the author may not be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR - * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES - * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. - * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, - * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, - * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY - * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF - * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -/** @addtogroup mips64 - * @{ - */ -/** @file - */ - -#include -#include -#include -#include -#include -#include -#include