Changeset 088b334 in mainline for boot/arch/arm32/src/mm.c
- Timestamp:
- 2013-02-24T11:24:16Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 8ab339e, b42c8d8
- Parents:
- df64dbc (diff), 9ad289d (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
boot/arch/arm32/src/mm.c
rdf64dbc r088b334 38 38 #include <arch/mm.h> 39 39 40 /** Disable the MMU */ 41 static void disable_paging(void) 42 { 43 asm volatile ( 44 "mrc p15, 0, r0, c1, c0, 0\n" 45 "bic r0, r0, #1\n" 46 "mcr p15, 0, r0, c1, c0, 0\n" 47 ::: "r0" 48 ); 49 } 50 40 51 /** Check if caching can be enabled for a given memory section. 41 52 * … … 59 70 const unsigned long address = section << PTE_SECTION_SHIFT; 60 71 if (address >= BBXM_RAM_START && address < BBXM_RAM_END) 72 return 1; 73 #elif defined MACHINE_beaglebone 74 const unsigned long address = section << PTE_SECTION_SHIFT; 75 if (address >= AM335x_RAM_START && address < AM335x_RAM_END) 61 76 return 1; 62 77 #endif … … 88 103 pte->tex = 0; 89 104 pte->access_permission_1 = 0; 105 pte->shareable = 0; 90 106 pte->non_global = 0; 91 107 pte->should_be_zero_2 = 0; … … 102 118 for (page = 0; page < split_page; page++) 103 119 init_ptl0_section(&boot_pt[page], page); 104 105 /*106 * Create 1:1 virtual-physical mapping in kernel space107 * (upper 2 GB), physical addresses start from 0.108 */109 /* BeagleBoard-xM (DM37x) memory starts at 2GB border,110 * thus mapping only lower 2GB is not not enough.111 * Map entire AS 1:1 instead and hope it works. */112 for (page = split_page; page < PTL0_ENTRIES; page++)113 #ifndef MACHINE_beagleboardxm114 init_ptl0_section(&boot_pt[page], page - split_page);115 #else116 init_ptl0_section(&boot_pt[page], page);117 #endif118 120 119 121 asm volatile ( … … 132 134 "ldr r0, =0x55555555\n" 133 135 "mcr p15, 0, r0, c3, c0, 0\n" 134 136 135 137 /* Current settings */ 136 138 "mrc p15, 0, r0, c1, c0, 0\n" … … 143 145 144 146 "orr r0, r0, r1\n" 147 148 /* Invalidate the TLB content before turning on the MMU. 149 * ARMv7-A Reference manual, B3.10.3 150 */ 151 "mcr p15, 0, r0, c8, c7, 0\n" 145 152 146 /* Store settings */153 /* Store settings, enable the MMU */ 147 154 "mcr p15, 0, r0, c1, c0, 0\n" 148 155 ::: "r0", "r1" … … 152 159 /** Start the MMU - initialize page table and enable paging. */ 153 160 void mmu_start() { 161 disable_paging(); 154 162 init_boot_pt(); 155 163 enable_paging();
Note:
See TracChangeset
for help on using the changeset viewer.