Index: arch/ia64/include/mm/page.h
===================================================================
--- arch/ia64/include/mm/page.h	(revision 578aebf7028f32bc437d7feed5f4da40cf5d4575)
+++ arch/ia64/include/mm/page.h	(revision 085434aa44aed066803577be18124785944a0f49)
@@ -46,5 +46,5 @@
 #define PAGE_SIZE	FRAME_SIZE
 #define PAGE_WIDTH	FRAME_WIDTH
-#define KERNEL_PAGE_WIDTH	26
+#define KERNEL_PAGE_WIDTH	28
 
 
@@ -230,6 +230,6 @@
 {
 	__u64 ret;
-	
 	ASSERT(i < REGION_REGISTERS);
+	i=i<<VRN_SHIFT;
 	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i));
 	
@@ -246,4 +246,5 @@
 {
 	ASSERT(i < REGION_REGISTERS);
+	i=i<<VRN_SHIFT;
 	__asm__ volatile (
 	"mov rr[%0] = %1;;\n" 
Index: arch/ia64/src/mm/page.c
===================================================================
--- arch/ia64/src/mm/page.c	(revision 578aebf7028f32bc437d7feed5f4da40cf5d4575)
+++ arch/ia64/src/mm/page.c	(revision 085434aa44aed066803577be18124785944a0f49)
@@ -57,5 +57,4 @@
 {
 
-//#ifdef NEVERDEFINED	
 	region_register rr;
 	pta_register pta;	
@@ -64,9 +63,11 @@
 	/*
 	 * First set up kernel region register.
+	 * This action is redundand (see start.S) but I would to keep it to make sure that 
+	 *no unexpected changes will be made. 
 	 */
 	rr.word = rr_read(VRN_KERNEL);
 	rr.map.ve = 0;                  /* disable VHPT walker */
 	rr.map.ps = PAGE_WIDTH;
-	rr.map.rid = ASID_KERNEL;
+	rr.map.rid = ASID2RID(ASID_KERNEL,VRN_KERNEL);  
 	rr_write(VRN_KERNEL, rr.word);
 	srlz_i();
@@ -83,5 +84,5 @@
 		rr.word == rr_read(i);
 		rr.map.ve = 0;		/* disable VHPT walker */
-		rr.map.rid = ASID_INVALID;
+		rr.map.rid = ASID2RID(ASID_INVALID,i);
 		rr_write(i, rr.word);
 		srlz_i();
@@ -101,5 +102,4 @@
 	srlz_d();
 	
-//#endif
 
 	return ;	
Index: arch/ia64/src/start.S
===================================================================
--- arch/ia64/src/start.S	(revision 578aebf7028f32bc437d7feed5f4da40cf5d4575)
+++ arch/ia64/src/start.S	(revision 085434aa44aed066803577be18124785944a0f49)
@@ -51,14 +51,5 @@
 	.auto
 
-	#Fill TR.i and TR.d and enable paging
-
-	mov r9=rr[r0]
-	movl r10=(RR_MASK)
-	and r9=r10,r9
-	movl r10=((ASID2RID(ASID_KERNEL,VRN_KERNEL)<<RID_SHIFT)|(KERNEL_PAGE_WIDTH<<PS_SHIFT))
-	or  r9=r10,r9
-	mov rr[r0]=r9
-
-	
+	#Fill TR.i and TR.d using Region Register #VRN_KERNEL
 
 	movl r8=(VRN_KERNEL<<VRN_SHIFT)
@@ -82,9 +73,4 @@
 
 
-
-
-
-
-
 	# initialize PSR
 	mov psr.l = r0
@@ -101,13 +87,7 @@
 	srlz.i
 .explicit
+
+	/*Return from interupt is only the way how to fill upper half word of PSR*/
 	{rfi;;}
-	{nop 0;;}
-	{nop 0;;}
-	{nop 0;;}
-	{nop 0;;}
-	{nop 0;;}
-	{nop 0;;}
-	{nop 0;;}
-	{nop 0;;}
 	{nop 0;;}
 	{nop 0;;}
@@ -120,5 +100,14 @@
 
 .global paging_start
+	/*Now we are paging*/
 paging_start:
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
+	{nop 0;;}
 
 .auto