Changeset 00aece0 in mainline for uspace/drv/nic
- Timestamp:
- 2012-02-18T16:47:38Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/fix-logger-deadlock, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 4449c6c
- Parents:
- bd5f3b7 (diff), f943dd3 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - Location:
- uspace/drv/nic
- Files:
-
- 17 added
- 3 moved
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e1k/Makefile (added)
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e1k/e1k.c (added)
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e1k/e1k.h (added)
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e1k/e1k.ma (added)
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lo/Makefile (added)
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lo/lo.c (added)
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lo/lo.ma (added)
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ne2k/Makefile (added)
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ne2k/dp8390.c (moved) (moved from uspace/srv/hw/netif/ne2000/dp8390.c ) (22 diffs)
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ne2k/dp8390.h (moved) (moved from uspace/srv/hw/netif/ne2000/dp8390.h ) (6 diffs)
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ne2k/ne2k.c (added)
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ne2k/ne2k.ma (added)
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rtl8139/Makefile (added)
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rtl8139/defs.c (added)
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rtl8139/defs.h (added)
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rtl8139/driver.c (added)
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rtl8139/driver.h (added)
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rtl8139/general.c (added)
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rtl8139/general.h (moved) (moved from uspace/lib/net/include/netif_remote.h ) (2 diffs)
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rtl8139/rtl8139.ma (added)
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/nic/ne2k/dp8390.c
rbd5f3b7 r00aece0 2 2 * Copyright (c) 2009 Lukas Mejdrech 3 3 * Copyright (c) 2011 Martin Decky 4 * Copyright (c) 2011 Radim Vansa 4 5 * All rights reserved. 5 6 * … … 38 39 */ 39 40 40 /** @addtogroup ne2000 41 * @{ 42 */ 43 44 /** @file 41 /** 42 * @addtogroup drv_ne2k 43 * @{ 44 */ 45 46 /** 47 * @file 48 * @brief NE2000 driver core 45 49 * 46 50 * NE2000 (based on DP8390) network interface core implementation. … … 55 59 #include <stdio.h> 56 60 #include <libarch/ddi.h> 57 #include <net/packet.h>58 #include <packet_client.h>59 61 #include "dp8390.h" 60 62 … … 64 66 /** 6 * DP_PAGE >= 1514 bytes */ 65 67 #define SQ_PAGES 6 66 67 /* NE2000 implementation. */68 69 /** NE2000 Data Register */70 #define NE2K_DATA 0x001071 72 /** NE2000 Reset register */73 #define NE2K_RESET 0x001f74 75 /** NE2000 data start */76 #define NE2K_START 0x400077 78 /** NE2000 data size */79 #define NE2K_SIZE 0x400080 81 /** NE2000 retry count */82 #define NE2K_RETRY 0x100083 84 /** NE2000 error messages rate limiting */85 #define NE2K_ERL 1086 87 /** Minimum Ethernet packet size in bytes */88 #define ETH_MIN_PACK_SIZE 6089 90 /** Maximum Ethernet packet size in bytes */91 #define ETH_MAX_PACK_SIZE_TAGGED 151892 68 93 69 /** Type definition of the receive header … … 98 74 uint8_t status; 99 75 100 /** Pointer to next packet*/76 /** Pointer to next frame */ 101 77 uint8_t next; 102 78 … … 164 140 static void ne2k_upload(ne2k_t *ne2k, void *buf, size_t addr, size_t size) 165 141 { 142 size_t esize_ru = (size + 1) & ~1; 166 143 size_t esize = size & ~1; 167 144 168 pio_write_8(ne2k->port + DP_RBCR0, esize & 0xff);169 pio_write_8(ne2k->port + DP_RBCR1, (esize >> 8) & 0xff);145 pio_write_8(ne2k->port + DP_RBCR0, esize_ru & 0xff); 146 pio_write_8(ne2k->port + DP_RBCR1, (esize_ru >> 8) & 0xff); 170 147 pio_write_8(ne2k->port + DP_RSAR0, addr & 0xff); 171 148 pio_write_8(ne2k->port + DP_RSAR1, (addr >> 8) & 0xff); … … 216 193 * 217 194 */ 218 int ne2k_probe(ne2k_t *ne2k , void *port, int irq)195 int ne2k_probe(ne2k_t *ne2k) 219 196 { 220 197 unsigned int i; 221 222 /* General initialization */223 ne2k->port = port;224 ne2k->data_port = ne2k->port + NE2K_DATA;225 ne2k->irq = irq;226 ne2k->probed = false;227 ne2k->up = false;228 198 229 199 ne2k_init(ne2k); … … 247 217 248 218 for (i = 0; i < ETH_ADDR; i++) 249 ne2k->mac[i] = pio_read_16(ne2k->data_port); 250 251 ne2k->probed = true; 219 ne2k->mac.address[i] = pio_read_16(ne2k->data_port); 220 252 221 return EOK; 222 } 223 224 void ne2k_set_physical_address(ne2k_t *ne2k, const nic_address_t *address) 225 { 226 memcpy(&ne2k->mac, address, sizeof(nic_address_t)); 227 228 pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_DM_ABORT | CR_STP); 229 230 pio_write_8(ne2k->port + DP_RBCR0, ETH_ADDR << 1); 231 pio_write_8(ne2k->port + DP_RBCR1, 0); 232 pio_write_8(ne2k->port + DP_RSAR0, 0); 233 pio_write_8(ne2k->port + DP_RSAR1, 0); 234 pio_write_8(ne2k->port + DP_CR, CR_DM_RW | CR_PS_P0 | CR_STA); 235 236 size_t i; 237 for (i = 0; i < ETH_ADDR; i++) 238 pio_write_16(ne2k->data_port, ne2k->mac.address[i]); 239 240 //pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_DM_ABORT | CR_STA); 253 241 } 254 242 … … 304 292 305 293 /* Step 4: */ 306 pio_write_8(ne2k->port + DP_RCR, RCR_AB);294 pio_write_8(ne2k->port + DP_RCR, ne2k->receive_configuration); 307 295 308 296 /* Step 5: */ … … 324 312 pio_write_8(ne2k->port + DP_CR, CR_PS_P1 | CR_DM_ABORT | CR_STP); 325 313 326 pio_write_8(ne2k->port + DP_PAR0, ne2k->mac [0]);327 pio_write_8(ne2k->port + DP_PAR1, ne2k->mac [1]);328 pio_write_8(ne2k->port + DP_PAR2, ne2k->mac [2]);329 pio_write_8(ne2k->port + DP_PAR3, ne2k->mac [3]);330 pio_write_8(ne2k->port + DP_PAR4, ne2k->mac [4]);331 pio_write_8(ne2k->port + DP_PAR5, ne2k->mac [5]);332 333 pio_write_8(ne2k->port + DP_MAR0, 0 xff);334 pio_write_8(ne2k->port + DP_MAR1, 0 xff);335 pio_write_8(ne2k->port + DP_MAR2, 0 xff);336 pio_write_8(ne2k->port + DP_MAR3, 0 xff);337 pio_write_8(ne2k->port + DP_MAR4, 0 xff);338 pio_write_8(ne2k->port + DP_MAR5, 0 xff);339 pio_write_8(ne2k->port + DP_MAR6, 0 xff);340 pio_write_8(ne2k->port + DP_MAR7, 0 xff);314 pio_write_8(ne2k->port + DP_PAR0, ne2k->mac.address[0]); 315 pio_write_8(ne2k->port + DP_PAR1, ne2k->mac.address[1]); 316 pio_write_8(ne2k->port + DP_PAR2, ne2k->mac.address[2]); 317 pio_write_8(ne2k->port + DP_PAR3, ne2k->mac.address[3]); 318 pio_write_8(ne2k->port + DP_PAR4, ne2k->mac.address[4]); 319 pio_write_8(ne2k->port + DP_PAR5, ne2k->mac.address[5]); 320 321 pio_write_8(ne2k->port + DP_MAR0, 0); 322 pio_write_8(ne2k->port + DP_MAR1, 0); 323 pio_write_8(ne2k->port + DP_MAR2, 0); 324 pio_write_8(ne2k->port + DP_MAR3, 0); 325 pio_write_8(ne2k->port + DP_MAR4, 0); 326 pio_write_8(ne2k->port + DP_MAR5, 0); 327 pio_write_8(ne2k->port + DP_MAR6, 0); 328 pio_write_8(ne2k->port + DP_MAR7, 0); 341 329 342 330 pio_write_8(ne2k->port + DP_CURR, ne2k->start_page + 1); … … 372 360 } 373 361 362 static void ne2k_reset(ne2k_t *ne2k) 363 { 364 unsigned int i; 365 366 fibril_mutex_lock(&ne2k->sq_mutex); 367 368 /* Stop the chip */ 369 pio_write_8(ne2k->port + DP_CR, CR_STP | CR_DM_ABORT); 370 pio_write_8(ne2k->port + DP_RBCR0, 0); 371 pio_write_8(ne2k->port + DP_RBCR1, 0); 372 373 for (i = 0; i < NE2K_RETRY; i++) { 374 if ((pio_read_8(ne2k->port + DP_ISR) & ISR_RST) != 0) 375 break; 376 } 377 378 pio_write_8(ne2k->port + DP_TCR, TCR_1EXTERNAL | TCR_OFST); 379 pio_write_8(ne2k->port + DP_CR, CR_STA | CR_DM_ABORT); 380 pio_write_8(ne2k->port + DP_TCR, TCR_NORMAL); 381 382 /* Acknowledge the ISR_RDC (remote DMA) interrupt */ 383 for (i = 0; i < NE2K_RETRY; i++) { 384 if ((pio_read_8(ne2k->port + DP_ISR) & ISR_RDC) != 0) 385 break; 386 } 387 388 uint8_t val = pio_read_8(ne2k->port + DP_ISR); 389 pio_write_8(ne2k->port + DP_ISR, val & ~ISR_RDC); 390 391 /* 392 * Reset the transmit ring. If we were transmitting a frame, 393 * we pretend that the frame is processed. Higher layers will 394 * retransmit if the frame wasn't actually sent. 395 */ 396 ne2k->sq.dirty = false; 397 398 fibril_mutex_unlock(&ne2k->sq_mutex); 399 } 400 374 401 /** Send a frame. 375 402 * 376 403 * @param[in,out] ne2k Network interface structure. 377 * @param[in] packet Frame to be sent. 378 * 379 */ 380 void ne2k_send(ne2k_t *ne2k, packet_t *packet) 381 { 404 * @param[in] data Pointer to frame data 405 * @param[in] size Frame size in bytes 406 * 407 */ 408 void ne2k_send(nic_t *nic_data, void *data, size_t size) 409 { 410 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); 411 382 412 assert(ne2k->probed); 383 413 assert(ne2k->up); 384 414 385 415 fibril_mutex_lock(&ne2k->sq_mutex); 386 416 387 while (ne2k->sq.dirty) 417 while (ne2k->sq.dirty) { 388 418 fibril_condvar_wait(&ne2k->sq_cv, &ne2k->sq_mutex); 389 390 void *buf = packet_get_data(packet); 391 size_t size = packet_get_data_length(packet); 419 } 392 420 393 421 if ((size < ETH_MIN_PACK_SIZE) || (size > ETH_MAX_PACK_SIZE_TAGGED)) { 394 422 fibril_mutex_unlock(&ne2k->sq_mutex); 395 fprintf(stderr, "%s: Frame dropped (invalid size %zu bytes)\n",396 NAME, size);397 423 return; 398 424 } 399 425 400 426 /* Upload the frame to the ethernet card */ 401 ne2k_upload(ne2k, buf, ne2k->sq.page * DP_PAGE, size);427 ne2k_upload(ne2k, data, ne2k->sq.page * DP_PAGE, size); 402 428 ne2k->sq.dirty = true; 403 429 ne2k->sq.size = size; 404 430 405 431 /* Initialize the transfer */ 406 432 pio_write_8(ne2k->port + DP_TPSR, ne2k->sq.page); … … 408 434 pio_write_8(ne2k->port + DP_TBCR1, (size >> 8) & 0xff); 409 435 pio_write_8(ne2k->port + DP_CR, CR_TXP | CR_STA); 410 411 436 fibril_mutex_unlock(&ne2k->sq_mutex); 412 437 } 413 438 414 static void ne2k_reset(ne2k_t *ne2k) 415 { 416 unsigned int i; 417 418 /* Stop the chip */ 419 pio_write_8(ne2k->port + DP_CR, CR_STP | CR_DM_ABORT); 420 pio_write_8(ne2k->port + DP_RBCR0, 0); 421 pio_write_8(ne2k->port + DP_RBCR1, 0); 422 423 for (i = 0; i < NE2K_RETRY; i++) { 424 if ((pio_read_8(ne2k->port + DP_ISR) & ISR_RST) != 0) 425 break; 426 } 427 428 pio_write_8(ne2k->port + DP_TCR, TCR_1EXTERNAL | TCR_OFST); 429 pio_write_8(ne2k->port + DP_CR, CR_STA | CR_DM_ABORT); 430 pio_write_8(ne2k->port + DP_TCR, TCR_NORMAL); 431 432 /* Acknowledge the ISR_RDC (remote DMA) interrupt */ 433 for (i = 0; i < NE2K_RETRY; i++) { 434 if ((pio_read_8(ne2k->port + DP_ISR) & ISR_RDC) != 0) 435 break; 436 } 437 438 uint8_t val = pio_read_8(ne2k->port + DP_ISR); 439 pio_write_8(ne2k->port + DP_ISR, val & ~ISR_RDC); 440 441 /* 442 * Reset the transmit ring. If we were transmitting a frame, 443 * we pretend that the packet is processed. Higher layers will 444 * retransmit if the packet wasn't actually sent. 445 */ 446 fibril_mutex_lock(&ne2k->sq_mutex); 447 ne2k->sq.dirty = false; 448 fibril_mutex_unlock(&ne2k->sq_mutex); 449 } 450 451 static frame_t *ne2k_receive_frame(ne2k_t *ne2k, uint8_t page, size_t length) 452 { 453 frame_t *frame = (frame_t *) malloc(sizeof(frame_t)); 439 static nic_frame_t *ne2k_receive_frame(nic_t *nic_data, uint8_t page, 440 size_t length) 441 { 442 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); 443 444 nic_frame_t *frame = nic_alloc_frame(nic_data, length); 454 445 if (frame == NULL) 455 446 return NULL; 456 447 457 link_initialize(&frame->link); 458 459 frame->packet = netif_packet_get_1(length); 460 if (frame->packet == NULL) { 461 free(frame); 462 return NULL; 463 } 464 465 void *buf = packet_suffix(frame->packet, length); 466 bzero(buf, length); 448 bzero(frame->data, length); 467 449 uint8_t last = page + length / DP_PAGE; 468 450 … … 470 452 size_t left = (ne2k->stop_page - page) * DP_PAGE 471 453 - sizeof(recv_header_t); 472 473 ne2k_download(ne2k, buf, page * DP_PAGE + sizeof(recv_header_t), 454 ne2k_download(ne2k, frame->data, page * DP_PAGE + sizeof(recv_header_t), 474 455 left); 475 ne2k_download(ne2k, buf+ left, ne2k->start_page * DP_PAGE,456 ne2k_download(ne2k, frame->data + left, ne2k->start_page * DP_PAGE, 476 457 length - left); 477 } else 478 ne2k_download(ne2k, buf, page * DP_PAGE + sizeof(recv_header_t),458 } else { 459 ne2k_download(ne2k, frame->data, page * DP_PAGE + sizeof(recv_header_t), 479 460 length); 480 481 ne2k->stats.receive_packets++; 461 } 482 462 return frame; 483 463 } 484 464 485 static list_t *ne2k_receive(ne2k_t *ne2k) 486 { 465 static void ne2k_receive(nic_t *nic_data) 466 { 467 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); 487 468 /* 488 469 * Allocate memory for the list of received frames. … … 490 471 * frames from the network, but they will be lost. 491 472 */ 492 list_t *frames = (list_t *) malloc(sizeof(list_t)); 493 if (frames != NULL) 494 list_initialize(frames); 495 496 while (true) { 473 nic_frame_list_t *frames = nic_alloc_frame_list(); 474 size_t frames_count = 0; 475 476 /* We may block sending in this loop - after so many received frames there 477 * must be some interrupt pending (for the frames not yet downloaded) and 478 * we will continue in its handler. */ 479 while (frames_count < 16) { 480 //TODO: isn't some locking necessary here? 497 481 uint8_t boundary = pio_read_8(ne2k->port + DP_BNRY) + 1; 498 482 … … 503 487 uint8_t current = pio_read_8(ne2k->port + DP_CURR); 504 488 pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_STA); 505 506 489 if (current == boundary) 507 490 /* No more frames to process */ … … 520 503 521 504 pio_read_buf_16(ne2k->data_port, (void *) &header, size); 522 505 523 506 size_t length = 524 507 (((size_t) header.rbcl) | (((size_t) header.rbch) << 8)) - size; … … 527 510 if ((length < ETH_MIN_PACK_SIZE) 528 511 || (length > ETH_MAX_PACK_SIZE_TAGGED)) { 529 fprintf(stderr, "%s: Rant frame (%zu bytes)\n", NAME, length);530 512 next = current; 531 513 } else if ((header.next < ne2k->start_page) 532 514 || (header.next > ne2k->stop_page)) { 533 fprintf(stderr, "%s: Malformed next frame %u\n", NAME,534 header.next);535 515 next = current; 536 516 } else if (header.status & RSR_FO) { … … 539 519 * reset the buffers. 540 520 */ 541 fprintf(stderr, "%s: FIFO overrun\n", NAME);542 521 ne2k->overruns++; 543 522 next = current; 544 523 } else if ((header.status & RSR_PRX) && (ne2k->up)) { 545 524 if (frames != NULL) { 546 frame_t *frame = ne2k_receive_frame(ne2k, boundary, length); 547 if (frame != NULL) 548 list_append(&frame->link, frames); 549 } 525 nic_frame_t *frame = 526 ne2k_receive_frame(nic_data, boundary, length); 527 if (frame != NULL) { 528 nic_frame_list_append(frames, frame); 529 frames_count++; 530 } else { 531 break; 532 } 533 } else 534 break; 550 535 } 551 536 … … 553 538 * Update the boundary pointer 554 539 * to the value of the page 555 * prior to the next packetto540 * prior to the next frame to 556 541 * be processed. 557 542 */ … … 560 545 else 561 546 next--; 562 563 547 pio_write_8(ne2k->port + DP_BNRY, next); 564 548 } 565 566 return frames; 567 } 568 569 list_t *ne2k_interrupt(ne2k_t *ne2k, uint8_t isr, uint8_t tsr) 570 { 571 /* List of received frames */ 572 list_t *frames = NULL; 573 549 nic_received_frame_list(nic_data, frames); 550 } 551 552 void ne2k_interrupt(nic_t *nic_data, uint8_t isr, uint8_t tsr) 553 { 554 ne2k_t *ne2k = (ne2k_t *) nic_get_specific(nic_data); 555 574 556 if (isr & (ISR_PTX | ISR_TXE)) { 575 if (isr & ISR_TXE) 576 ne2k->stats.send_errors++; 577 else { 578 if (tsr & TSR_PTX) 579 ne2k->stats.send_packets++; 580 581 if (tsr & TSR_COL) 582 ne2k->stats.collisions++; 583 584 if (tsr & TSR_ABT) 585 ne2k->stats.send_aborted_errors++; 586 587 if (tsr & TSR_CRS) 588 ne2k->stats.send_carrier_errors++; 589 590 if (tsr & TSR_FU) { 591 ne2k->underruns++; 592 if (ne2k->underruns < NE2K_ERL) 593 fprintf(stderr, "%s: FIFO underrun\n", NAME); 594 } 595 596 if (tsr & TSR_CDH) { 597 ne2k->stats.send_heartbeat_errors++; 598 if (ne2k->stats.send_heartbeat_errors < NE2K_ERL) 599 fprintf(stderr, "%s: CD heartbeat failure\n", NAME); 600 } 601 602 if (tsr & TSR_OWC) 603 ne2k->stats.send_window_errors++; 557 if (tsr & TSR_COL) { 558 nic_report_collisions(nic_data, 559 pio_read_8(ne2k->port + DP_NCR) & 15); 604 560 } 605 561 562 if (tsr & TSR_PTX) { 563 // TODO: fix number of sent bytes (but how?) 564 nic_report_send_ok(nic_data, 1, 0); 565 } else if (tsr & TSR_ABT) { 566 nic_report_send_error(nic_data, NIC_SEC_ABORTED, 1); 567 } else if (tsr & TSR_CRS) { 568 nic_report_send_error(nic_data, NIC_SEC_CARRIER_LOST, 1); 569 } else if (tsr & TSR_FU) { 570 ne2k->underruns++; 571 // if (ne2k->underruns < NE2K_ERL) { 572 // } 573 } else if (tsr & TSR_CDH) { 574 nic_report_send_error(nic_data, NIC_SEC_HEARTBEAT, 1); 575 // if (nic_data->stats.send_heartbeat_errors < NE2K_ERL) { 576 // } 577 } else if (tsr & TSR_OWC) { 578 nic_report_send_error(nic_data, NIC_SEC_WINDOW_ERROR, 1); 579 } 580 606 581 fibril_mutex_lock(&ne2k->sq_mutex); 607 608 582 if (ne2k->sq.dirty) { 609 /* Prepare the buffer for next packet*/583 /* Prepare the buffer for next frame */ 610 584 ne2k->sq.dirty = false; 611 585 ne2k->sq.size = 0; … … 615 589 } else { 616 590 ne2k->misses++; 617 if (ne2k->misses < NE2K_ERL)618 fprintf(stderr, "%s: Spurious PTX interrupt\n", NAME);591 // if (ne2k->misses < NE2K_ERL) { 592 // } 619 593 } 620 621 594 fibril_mutex_unlock(&ne2k->sq_mutex); 622 595 } 623 624 if (isr & ISR_RXE) 625 ne2k->stats.receive_errors++; 626 596 627 597 if (isr & ISR_CNT) { 628 ne2k->stats.receive_crc_errors +=629 pio_read_8(ne2k->port + DP_CNTR0);630 ne2k->stats.receive_frame_errors +=631 pio_read_8(ne2k->port + DP_CNTR1);632 ne2k->stats.receive_missed_errors +=633 pio_read_8(ne2k->port + DP_CNTR2);634 }635 636 if (isr & ISR_PRX) 637 frames = ne2k_receive(ne2k);638 598 unsigned int errors; 599 for (errors = pio_read_8(ne2k->port + DP_CNTR0); errors > 0; --errors) 600 nic_report_receive_error(nic_data, NIC_REC_CRC, 1); 601 for (errors = pio_read_8(ne2k->port + DP_CNTR1); errors > 0; --errors) 602 nic_report_receive_error(nic_data, NIC_REC_FRAME_ALIGNMENT, 1); 603 for (errors = pio_read_8(ne2k->port + DP_CNTR2); errors > 0; --errors) 604 nic_report_receive_error(nic_data, NIC_REC_MISSED, 1); 605 } 606 if (isr & ISR_PRX) { 607 ne2k_receive(nic_data); 608 } 639 609 if (isr & ISR_RST) { 640 610 /* … … 648 618 pio_write_8(ne2k->port + DP_IMR, 649 619 IMR_PRXE | IMR_PTXE | IMR_RXEE | IMR_TXEE | IMR_OVWE | IMR_CNTE); 650 651 return frames; 620 } 621 622 void ne2k_set_accept_bcast(ne2k_t *ne2k, int accept) 623 { 624 if (accept) 625 ne2k->receive_configuration |= RCR_AB; 626 else 627 ne2k->receive_configuration &= ~RCR_AB; 628 629 pio_write_8(ne2k->port + DP_RCR, ne2k->receive_configuration); 630 } 631 632 void ne2k_set_accept_mcast(ne2k_t *ne2k, int accept) 633 { 634 if (accept) 635 ne2k->receive_configuration |= RCR_AM; 636 else 637 ne2k->receive_configuration &= ~RCR_AM; 638 639 pio_write_8(ne2k->port + DP_RCR, ne2k->receive_configuration); 640 } 641 642 void ne2k_set_promisc_phys(ne2k_t *ne2k, int promisc) 643 { 644 if (promisc) 645 ne2k->receive_configuration |= RCR_PRO; 646 else 647 ne2k->receive_configuration &= ~RCR_PRO; 648 649 pio_write_8(ne2k->port + DP_RCR, ne2k->receive_configuration); 650 } 651 652 void ne2k_set_mcast_hash(ne2k_t *ne2k, uint64_t hash) 653 { 654 /* Select Page 1 and stop all transfers */ 655 pio_write_8(ne2k->port + DP_CR, CR_PS_P1 | CR_DM_ABORT | CR_STP); 656 657 pio_write_8(ne2k->port + DP_MAR0, (uint8_t) hash); 658 pio_write_8(ne2k->port + DP_MAR1, (uint8_t) (hash >> 8)); 659 pio_write_8(ne2k->port + DP_MAR2, (uint8_t) (hash >> 16)); 660 pio_write_8(ne2k->port + DP_MAR3, (uint8_t) (hash >> 24)); 661 pio_write_8(ne2k->port + DP_MAR4, (uint8_t) (hash >> 32)); 662 pio_write_8(ne2k->port + DP_MAR5, (uint8_t) (hash >> 40)); 663 pio_write_8(ne2k->port + DP_MAR6, (uint8_t) (hash >> 48)); 664 pio_write_8(ne2k->port + DP_MAR7, (uint8_t) (hash >> 56)); 665 666 /* Select Page 0 and resume transfers */ 667 pio_write_8(ne2k->port + DP_CR, CR_PS_P0 | CR_DM_ABORT | CR_STA); 652 668 } 653 669 -
uspace/drv/nic/ne2k/dp8390.h
rbd5f3b7 r00aece0 2 2 * Copyright (c) 2009 Lukas Mejdrech 3 3 * Copyright (c) 2011 Martin Decky 4 * Copyright (c) 2011 Radim Vansa 4 5 * All rights reserved. 5 6 * … … 38 39 */ 39 40 40 /** @addtogroup ne200041 /** @addtogroup drv_ne2k 41 42 * @{ 42 43 */ … … 50 51 51 52 #include <fibril_synch.h> 52 #include <adt/list.h> 53 #include <net/packet.h> 54 #include <netif_skel.h> 55 56 /** Module name */ 57 #define NAME "ne2000" 53 #include <nic.h> 54 #include <ddf/interrupt.h> 58 55 59 56 /** Input/output size */ 60 57 #define NE2K_IO_SIZE 0x0020 61 58 62 /** Ethernet address length */ 63 #define ETH_ADDR 6 59 /* NE2000 implementation. */ 60 61 /** NE2000 Data Register */ 62 #define NE2K_DATA 0x0010 63 64 /** NE2000 Reset register */ 65 #define NE2K_RESET 0x001f 66 67 /** NE2000 data start */ 68 #define NE2K_START 0x4000 69 70 /** NE2000 data size */ 71 #define NE2K_SIZE 0x4000 72 73 /** NE2000 retry count */ 74 #define NE2K_RETRY 0x1000 75 76 /** NE2000 error messages rate limiting */ 77 #define NE2K_ERL 10 78 79 /** Minimum Ethernet packet size in bytes */ 80 #define ETH_MIN_PACK_SIZE 60 81 82 /** Maximum Ethernet packet size in bytes */ 83 #define ETH_MAX_PACK_SIZE_TAGGED 1518 64 84 65 85 /* National Semiconductor DP8390 Network Interface Controller. */ … … 204 224 typedef struct { 205 225 /* Device configuration */ 226 void *base_port; /**< Port assigned from ISA configuration **/ 206 227 void *port; 207 228 void *data_port; 208 229 int irq; 209 uint8_t mac[ETH_ADDR];230 nic_address_t mac; 210 231 211 232 uint8_t start_page; /**< Ring buffer start page */ … … 224 245 bool probed; 225 246 bool up; 226 247 248 /* Irq code with assigned addresses for this device */ 249 irq_code_t code; 250 251 /* Copy of the receive configuration register */ 252 uint8_t receive_configuration; 253 227 254 /* Device statistics */ 228 device_stats_t stats;255 // TODO: shouldn't be these directly in device.h - nic_device_stats? 229 256 uint64_t misses; /**< Receive frame misses */ 230 257 uint64_t underruns; /**< FIFO underruns */ … … 232 259 } ne2k_t; 233 260 234 typedef struct { 235 link_t link; 236 packet_t *packet; 237 } frame_t; 238 239 extern int ne2k_probe(ne2k_t *, void *, int); 261 extern int ne2k_probe(ne2k_t *); 240 262 extern int ne2k_up(ne2k_t *); 241 263 extern void ne2k_down(ne2k_t *); 242 extern void ne2k_send(ne2k_t *, packet_t *); 243 extern list_t *ne2k_interrupt(ne2k_t *, uint8_t, uint8_t); 264 extern void ne2k_send(nic_t *, void *, size_t); 265 extern void ne2k_interrupt(nic_t *, uint8_t, uint8_t); 266 267 extern void ne2k_set_accept_mcast(ne2k_t *, int); 268 extern void ne2k_set_accept_bcast(ne2k_t *, int); 269 extern void ne2k_set_promisc_phys(ne2k_t *, int); 270 extern void ne2k_set_mcast_hash(ne2k_t *, uint64_t); 271 extern void ne2k_set_physical_address(ne2k_t *, const nic_address_t *address); 244 272 245 273 #endif -
uspace/drv/nic/rtl8139/general.h
rbd5f3b7 r00aece0 1 1 /* 2 * Copyright (c) 20 09 Lukas Mejdrech2 * Copyright (c) 2011 Jiri Michalec 3 3 * All rights reserved. 4 4 * … … 27 27 */ 28 28 29 /** @addtogroup libnet 30 * @{ 29 /** @file 30 * 31 * General functions and structures used in rtl8139 driver 31 32 */ 32 33 33 #ifndef LIBNET_NETIF_REMOTE_H_34 #define LIBNET_NETIF_REMOTE_H_34 #ifndef RTL8139_GENERAL_H_ 35 #define RTL8139_GENERAL_H_ 35 36 36 #include <ipc/services.h> 37 #include <adt/measured_strings.h> 38 #include <net/device.h> 39 #include <net/packet.h> 40 #include <async.h> 37 #include <unistd.h> 41 38 42 extern int netif_get_addr_req(async_sess_t *, device_id_t, measured_string_t **, 43 uint8_t **); 44 extern int netif_probe_req(async_sess_t *, device_id_t, int, void *); 45 extern int netif_send_msg(async_sess_t *, device_id_t, packet_t *, services_t); 46 extern int netif_start_req(async_sess_t *, device_id_t); 47 extern int netif_stop_req(async_sess_t *, device_id_t); 48 extern int netif_stats_req(async_sess_t *, device_id_t, device_stats_t *); 49 extern async_sess_t *netif_bind_service(services_t, device_id_t, services_t, 50 async_client_conn_t); 39 /** Number of microseconds in second */ 40 #define RTL8139_USEC_IN_SEC 1000000 41 42 /** Structure for HW timer control */ 43 typedef struct { 44 /** Register value set in the last timer period */ 45 uint32_t last_val; 46 47 /** Register value set in the common timer period */ 48 uint32_t full_val; 49 50 /** Amount of full register periods in timer period */ 51 size_t full_skips; 52 53 /** Remaining full register periods to the next period end */ 54 size_t full_skips_remains; 55 56 /** Mark if there is a last run */ 57 int last_run; 58 } rtl8139_timer_act_t; 59 60 extern void *rtl8139_memcpy_wrapped(void *, const void *, size_t, size_t, 61 size_t); 62 extern int rtl8139_timer_act_init(rtl8139_timer_act_t *, uint32_t, 63 const struct timeval *); 64 extern int rtl8139_timer_act_step(rtl8139_timer_act_t *, uint32_t *); 51 65 52 66 #endif 53 54 /** @}55 */
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