Index: arch/ia32/src/cpu/cpu.c
===================================================================
--- arch/ia32/src/cpu/cpu.c	(revision 9c926f39b8a11f838823c4f9c29d773f16ec79ce)
+++ arch/ia32/src/cpu/cpu.c	(revision 00a44bcdbac2f97f6c5a0ff1720644725999356e)
@@ -62,7 +62,36 @@
 };
 
+void set_TS_flag(void)
+{
+	asm
+	(
+		"mov %%cr0,%%eax;"
+		"or $8,%%eax;"
+		"mov %%eax,%%cr0;"
+		:
+		:
+		:"%eax"
+	);
+}
+
+void reset_TS_flag(void)
+{
+	asm
+	(
+		"mov %%cr0,%%eax;"
+		"and $0xffFFffF7,%%eax;"
+		"mov %%eax,%%cr0;"
+		:
+		:
+		:"%eax"
+	);	
+}
+
+
+
 void cpu_arch_init(void)
 {
 	CPU->arch.tss = tss_p;
+	CPU->arch.fpu_owner=NULL;
 }
 
Index: arch/ia32/src/fpu_context.c
===================================================================
--- arch/ia32/src/fpu_context.c	(revision 9c926f39b8a11f838823c4f9c29d773f16ec79ce)
+++ arch/ia32/src/fpu_context.c	(revision 00a44bcdbac2f97f6c5a0ff1720644725999356e)
@@ -30,4 +30,7 @@
 
 #include <fpu_context.h>
+#include <arch.h>
+#include <cpu.h>
+
 
 void fpu_context_save(fpu_context_t *fctx)
@@ -38,4 +41,6 @@
 void fpu_context_restore(fpu_context_t *fctx)
 {
+	if(THREAD==CPU->arch.fpu_owner) reset_TS_flag();
+	else set_TS_flag();
 }