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Changes between Version 14 and Version 15 of DeveloperDocs


Ignore:
Timestamp:
2009-12-08T13:45:11Z (10 years ago)
Author:
Jiri Svoboda
Comment:

Remove extraneous blank lines.

Legend:

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  • DeveloperDocs

    v14 v15  
    1010   
    1111    * [http://support.amd.com/us/Processor_TechDocs/24592.pdf AMD64 Architecture Programmer’s Manual Volume 1: Application Programming]
    12 
    1312    * [http://support.amd.com/us/Processor_TechDocs/24593.pdf AMD64 Architecture Programmer’s Manual Volume 2: System Programming]
    14 
    1513    * [http://support.amd.com/us/Processor_TechDocs/24594.pdf AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions]
    16 
    1714    * [http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/25112.PDF Software Optimization Guide for AMD64 Processors]
    18 
    1915    * [http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/40546_GH_Optguide_Ver_3-10_2-12-09.pdf Software Optimization Guide for AMD Family 10h Processors]
    2016
     
    2420
    2521    * [http://www.arm.com/miscPDFs/14128.pdf ARM Architecture Reference Manual]
    26 
    2722    * [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042c/IHI0042C_aapcs.pdf Procedure Call Standard for the ARM Architecture]
    2823
     
    3025
    3126    * [http://www.intel.com/Assets/PDF/manual/253665.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 1: Basic Architecture]
    32    
    3327    * [http://www.intel.com/Assets/PDF/manual/253666.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2A: Instruction Set Reference, A-M]
    34 
    3528    * [http://www.intel.com/Assets/PDF/manual/253667.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 2B: Instruction Set Reference, N-Z]
    36 
    3729    * [http://www.intel.com/Assets/PDF/manual/253668.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3A: System Programming Guide, Part 1]
    38 
    3930    * [http://www.intel.com/Assets/PDF/manual/253669.pdf Intel® 64 and IA-32 Architectures Software Developer’s Manual Volume 3B: System Programming Guide, Part 2]
    40 
    4131    * [http://www.intel.com/Assets/PDF/manual/248966.pdf Intel® 64 and IA-32 Architectures Optimization Reference Manual]
    42 
    4332    * [http://download.intel.com/design/pentium/datashts/24201606.pdf MultiProcessor Specification]
    44 
    4533    * [http://www.intel.com/design/chipsets/datashts/29056601.pdf 82093AA I/O ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (IOAPIC)]
    46 
    4734    * [http://www.intel.com/design/chipsets/specupdt/29071001.pdf Intel 82093AA I/O Advanced Programmable Interrupt Controller (I/O APIC) Specification Update]
    48 
    4935    * [http://www.sco.com/developers/devspecs/abi386-4.pdf SYSTEM V APPLICATION BINARY INTERFACE Intel386 Architecture Processor Supplement]
    5036
     
    5238
    5339    * [http://download.intel.com/design/Itanium/manuals/24531705.pdf Intel Itanium Architecture Software Developer’s Manual Volume 1: Application Architecture]
    54    
    5540    * [http://download.intel.com/design/Itanium/manuals/24531805.pdf Intel Itanium Architecture Software Developer’s Manual Volume 2: System Architecture]
    56 
    5741    * [http://download.intel.com/design/Itanium/manuals/24531905.pdf Intel Itanium Architecture Software Developer’s Manual Volume 3: Instruction Set Reference]
    58 
    5942    * [http://download.intel.com/design/Itanium/Downloads/245358.pdf Intel Itanium Software Conventions & Runtime Architecture Guide]
    60 
    6143
    6244== MIPS ==
    6345
    6446    * [http://www.mips.com/media/files/archives/R4000%20Microprocessor%20Users%20Manual.pdf MIPS R4000 Microprocessor User’s Manual]
    65 
    6647    * [http://www.sco.com/developers/devspecs/mipsabi.pdf SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement]
    67 
    6848
    6949== PowerPC ==
    7050
    7151    * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/DC3D43B729FDAD2C00257419006FB955/$file/970MP_um.2008MAR07_pub.pdf IBM PowerPC 970MP RISC Microprocessor User’s Manual]
    72 
    7352    * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/852569B20050FF778525699600719DF2/$file/6xx_pem.pdf PowerPC Microprocessor Family: The Programming Environments for 32-Bit Microprocessors]
    74 
    7553    * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F7E732FF811F783187256FDD004D3797/$file/pem_64bit_v3.0.2005jul15.pdf PowerPC Microprocessor Family: The Programming Environments Manual for 64-bit Microprocessors]
    76 
    7754    * [http://refspecs.freestandards.org/elf/elfspec_ppc.pdf SYSTEM V APPLICATION BINARY INTERFACE PowerPC Processor Supplement]
    7855
     
    8158
    8259    * [http://www.sparc.org/standards/SPARCV9.pdf The SPARC Architecture Manual Version 9]
    83 
    8460    * [http://www.fujitsu.com/downloads/PRMPWR/JPS1-R1.0.4-Common-pub.pdf SPARC Joint Programming Specification (JPS1): Commonality]
    85 
    8661    * [http://www.sun.com/processors/manuals/802-7220-02.pdf UltraSPARC User’s Manual, UltraSPARC-I, UltraSPARC-II]
    87 
    8862    * [http://www.sparc.org/standards/SCD.2.4.ps.Z SPARC COMPLIANCE DEFINITION 2.4]
    89 
    9063    * [http://wikis.sun.com/display/FOSSdocs/Home FOSS Open Hardware Documentation]
    9164