= CPU Architecture Docs = == AMD64 == * [http://developer.amd.com/resources/documentation-articles/developer-guides-manuals/ Developer Guides, Manuals & ISA Documents] * [https://developer.amd.com/wordpress/media/2012/10/24592_APM_v11.pdf AMD64 Architecture Programmer’s Manual Volume 1: Application Programming] * [http://developer.amd.com/wordpress/media/2012/10/24593_APM_v2.pdf AMD64 Architecture Programmer’s Manual Volume 2: System Programming] * [https://www.amd.com/system/files/TechDocs/24594.pdf AMD64 Architecture Programmer’s Manual Volume 3: General-Purpose and System Instructions] * [http://support.amd.com/us/Processor_TechDocs/25112.PDF Software Optimization Guide for AMD64 Processors] * [http://support.amd.com/us/Processor_TechDocs/40546-PUB-Optguide_3-11_5-21-09.pdf Software Optimization Guide for AMD Family 10h Processors] * [http://www.x86-64.org/documentation/abi.pdf System V Application Binary Interface AMD64 Architecture Processor Supplement] == ARM == * [https://developer.arm.com/docs/ddi0100/latest ARM Architecture Reference Manual] [ARMv4–ARMv6] * [https://developer.arm.com/docs/ddi0406/latest ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition] * [https://developer.arm.com/docs/ddi0151/latest ARM920T (Rev 1) Technical Reference Manual] * [http://infocenter.arm.com/help/topic/com.arm.doc.ihi0044f/IHI0044F_aaelf.pdf ELF for the ARM Architecture] * [https://developer.arm.com/docs/ihi0042/latest Procedure Call Standard for the ARM Architecture] * [https://developer.arm.com/docs/ihi0043/latest Run-time ABI for the ARM Architecture] == ARM64 == * [https://developer.arm.com/docs/ddi0487/latest ARM Architecture Reference Manual ARMv8, for ARMv8-A architecture profile] * [https://developer.arm.com/docs/den0024/latest ARM Cortex-A Series Programmer’s Guide for ARMv8-A] * [https://developer.arm.com/docs/100898/latest The A64 instruction set] * [https://developer.arm.com/docs/uan0015/latest Cortex-A57 Software Optimization Guide Software Optimization Guide] * [https://developer.arm.com/docs/ihi0048/latest ARM Generic Interrupt Controller Architecture version 2.0 - Architecture Specification] * [https://developer.arm.com/docs/ihi0056/latest ELF for the ARM 64-bit Architecture (AArch64)] * [https://developer.arm.com/docs/ihi0055/latest Procedure Call Standard for the ARM 64-bit Architecture (AArch64) Documentation] == IA-32 == * [http://www.intel.com/content/www/us/en/processors/architectures-software-developer-manuals.html Intel® 64 and IA-32 Architectures Software Developer Manuals] * [http://download.intel.com/design/pentium/datashts/24201606.pdf MultiProcessor Specification] * [http://www.intel.com/design/chipsets/datashts/29056601.pdf 82093AA I/O ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (IOAPIC)] * [http://www.intel.com/design/chipsets/specupdt/29071001.pdf Intel 82093AA I/O Advanced Programmable Interrupt Controller (I/O APIC) Specification Update] * [http://www.sco.com/developers/devspecs/abi386-4.pdf System V ABI Intel386 Architecture Processor Supplement] * [https://www.uclibc.org/docs/psABI-i386.pdf System V ABI Intel386 Architecture Processor Supplement Version 1.0] == IA-64 == * [http://download.intel.com/design/Itanium/manuals/24531705.pdf Intel Itanium Architecture Software Developer’s Manual Volume 1: Application Architecture] * [http://download.intel.com/design/Itanium/manuals/24531805.pdf Intel Itanium Architecture Software Developer’s Manual Volume 2: System Architecture] * [http://download.intel.com/design/Itanium/manuals/24531905.pdf Intel Itanium Architecture Software Developer’s Manual Volume 3: Instruction Set Reference] * [https://www.intel.com/content/dam/www/public/us/en/documents/guides/itanium-software-runtime-architecture-guide.pdf Intel Itanium Software Conventions & Runtime Architecture Guide] * [http://refspecs.linuxbase.org/elf/IA64-SysV-psABI.pdf Intel Itanium Processor-specific Application Binary Interface (ABI)] == MIPS == * [http://www.mips.com/media/files/archives/R4000MicroprocessorUsersManual.pdf MIPS R4000 Microprocessor User’s Manual] * [http://www.mips.com/secure-download/index.dot?product_name=/auth/MD00016%2D2B%2D4K%2DSUM%2D01.18.pdf MIPS32® 4K® Processor Core Family Software User's Manual] [registration required] [http://www.google.com/search?q="MIPS32®+4K®+Processor+Core+Family+Software+User's+Manual"+filetype%3Apdf Google it!] * [http://www.sco.com/developers/devspecs/mipsabi.pdf SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement] * [http://www.mips.com/products/architectures/ Official index of MIPS architectures with manuals] (registration required to download manuals) * [http://www.mips.com/media/files/MD00565-2B-MIPS32-QRC-01.01.pdf MIPS32 Instruction Set Quick Reference] * [http://dkrizanc.web.wesleyan.edu/courses/231/07/MIPS_Vol1.pdf MIPS32® Architecture for Programmers Volume I: Introduction to the MIPS32® Architecture] (unofficial copy) * [http://dkrizanc.web.wesleyan.edu/courses/231/07/MIPS_Vol2.pdf MIPS32® Architecture for Programmers Volume II: The MIPS32® Instruction Set] * [http://dkrizanc.web.wesleyan.edu/courses/231/07/MIPS_Vol3.pdf MIPS32® Architecture for Programmers Volume III: The MIPS32® Privileged Resource Architecture] * [http://scc.ustc.edu.cn/zlsc/lxwycj/200910/W020100308600768363997.pdf MIPS64® Architecture for Programmers Volume I: Introduction to the MIPS64™ Architecture] (unofficial copy) * [http://dslab.csie.ncu.edu.tw/~yu/course/ca/mips64v2.pdf MIPS64® Architecture for Programmers Volume II: The MIPS64® Instruction Set] (unofficial copy) * [http://scc.ustc.edu.cn/zlsc/lxwycj/200910/W020100308600770617815.pdf MIPS64® Architecture For Programmers Volume III: The MIPS64® and microMIPS64™ Privileged Resource Architecture] (unofficial copy) == PowerPC == * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/DC3D43B729FDAD2C00257419006FB955/$file/970MP_um.2008MAR07_pub.pdf IBM PowerPC 970MP RISC Microprocessor User’s Manual] * [https://www.nxp.com/docs/en/reference-manual/MPCFPE32B.pdf PowerPC Microprocessor Family: The Programming Environments for 32-Bit Microprocessors] (unofficial copy) * [http://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/F7E732FF811F783187256FDD004D3797/$file/pem_64bit_v3.0.2005jul15.pdf PowerPC Microprocessor Family: The Programming Environments Manual for 64-bit Microprocessors] * [http://refspecs.linux-foundation.org/elf/elfspec_ppc.pdf SYSTEM V APPLICATION BINARY INTERFACE PowerPC Processor Supplement] * [https://www.polyomino.org.uk/publications/2011/Power-Arch-32-bit-ABI-supp-1.0-Unified.pdf Power Architecture® 32-bit Application Binary Interface Supplement 1.0 - Linux® & Embedded] == SPARC V9 == * [http://sparc.org/wp-content/uploads/2014/01/SPARCV9.pdf.gz The SPARC Architecture Manual, Version 9] * [http://www.fujitsu.com/downloads/PRMPWR/JPS1-R1.0.4-Common-pub.pdf SPARC Joint Programming Specification (JPS1): Commonality] * [http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/sparc-processor-2516655.html Oracle SPARC Processor Documentation] * [http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/120214-t4-d04-p-ext-2305974.pdf SPARC T4 Supplement to the Oracle SPARC Architecture 2011, Priv+Nonpriv] * [http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/120214-t4-d04-hp-ext-performance-2307329.pdf SPARC T4 Supplement to the Oracle SPARC Architecture 2011 - Performance Instrumentation, Priv+Nonpriv] * [http://www.oracle.com/technetwork/server-storage/sun-sparc-enterprise/documentation/140529-m5-d07-p-ext-2306120.pdf SPARC M5 Supplement to the Oracle SPARC Architecture 2011, Priv+Nonpriv] * [https://kenai.com/downloads/hypervisor/hypervisor-api-3.0draft4.pdf UltraSPARC Virtual Machine Specification] * [http://sparc.org/wp-content/uploads/2014/01/SCD.2.4.pdf.gz SPARC COMPLIANCE DEFINITION 2.4]