Opened 10 years ago
Closed 10 years ago
#634 closed defect (fixed)
Do not attempt to flush prefetch buffer on ARM920T
| Reported by: | Jakub Jermář | Owned by: | Jiri Svoboda |
|---|---|---|---|
| Priority: | major | Milestone: | 0.7.0 |
| Component: | helenos/boot/arm32 | Version: | mainline |
| Keywords: | ARM920T, ARMv4, gta02 | Cc: | |
| Blocker for: | Depends on: | ||
| See also: |
Description
ARMv4 optionally supports a prefetch buffer, but ARM920T does not implement it. Yet, the initialization boot code in boot/arch/arm32/src/asm.S:
# cp15 isb
mcr p15, 0, r4, c7, c5, 4
nop
and the inst_barrier() macro in kernel/arch/arm32/include/arch/barrier.h:
#if defined PROCESSOR_ARCH_armv7_a
...
#elif defined PROCESSOR_ARCH_armv6 | defined KERNEL
...
#define inst_barrier() CP15ISB_write(0)
#else
...
#define inst_barrier() asm volatile ("" ::: "memory")
#endif
attempt to flush it.
Note how CP15ISB_write() is used for KERNEL for <ARMv6 (and also how the barriers have possibly wrongly empty bodies in the else branch).
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Fix merged in mainline,2399.