Support PAE on ia32
|Reported by:||jermar||Owned by:||decky|
|Keywords:||gsoc12, gsoc13, gsoc14, gsoc15, gsoc16, gsoc17||Cc:|
|Blocker for:||Depends on:||#3|
Description (last modified by jermar)
Add support for Physical Address Extension to our ia32 port so that more than 4G of physical memory can be addressed.
- On all currently supported 32-bit platforms (arm32, ia32, mips32, ppc32), HelenOS assumes 32-bit physical addresses. This allows the system to make use of 4G of physical memory in total. Some of these architectures, however, provide extensions (e.g. PAE on ia32, LPAE on arm32) that make it possible to address more physical memory by using wider physical addresses (e.g. 36-bit or 40-bit).
There are actually two goals for this project. The first is to modify HelenOS to use a dedicated type for representing physical addresses instead of the current uintptr_t or void *, because the assumption that both virtual and physical addresses have the same amount of bits will no longer hold. The second goal is to implement the actual support for PAE in the form of PAE page table format and PAE feature detection and initialization.
- What Gains and Benefits will this bring?
- By having the PAE support on ia32, HelenOS will be able to utilize more of the installed memory. HelenOS will also become ready to support similar features on other architectures (think LPAE on arm32).
- Required skills
- Kernel programming skills are needed and the applicant should be strong in C and should have the ability to understand the HelenOS memory management subsystem quickly.
- Developer documentation for IA-32 architecture
- HelenOS abstraction for virtual address translation
- Memory management implementation for IA-32 (headers)
- Possible mentors
- HelenOS Core Team, Jakub Jermar