00001 /* 00002 * Copyright (C) 2005 Jakub Vana 00003 * All rights reserved. 00004 * 00005 * Redistribution and use in source and binary forms, with or without 00006 * modification, are permitted provided that the following conditions 00007 * are met: 00008 * 00009 * - Redistributions of source code must retain the above copyright 00010 * notice, this list of conditions and the following disclaimer. 00011 * - Redistributions in binary form must reproduce the above copyright 00012 * notice, this list of conditions and the following disclaimer in the 00013 * documentation and/or other materials provided with the distribution. 00014 * - The name of the author may not be used to endorse or promote products 00015 * derived from this software without specific prior written permission. 00016 * 00017 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 00018 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 00019 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 00020 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 00021 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 00022 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 00023 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 00024 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 00025 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 00026 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 00027 */ 00028 00036 #include <fpu_context.h> 00037 #include <arch.h> 00038 #include <cpu.h> 00039 00040 typedef void (*fpu_context_function)(fpu_context_t *fctx); 00041 00042 static fpu_context_function fpu_save,fpu_restore; 00043 00044 00045 00046 static void fpu_context_f_save(fpu_context_t *fctx) 00047 { 00048 __asm__ volatile ( 00049 "fnsave %0" 00050 : "=m"(*fctx) 00051 ); 00052 } 00053 00054 static void fpu_context_f_restore(fpu_context_t *fctx) 00055 { 00056 __asm__ volatile ( 00057 "frstor %0" 00058 : "=m"(*fctx) 00059 ); 00060 } 00061 00062 static void fpu_context_fx_save(fpu_context_t *fctx) 00063 { 00064 __asm__ volatile ( 00065 "fxsave %0" 00066 : "=m"(*fctx) 00067 ); 00068 } 00069 00070 static void fpu_context_fx_restore(fpu_context_t *fctx) 00071 { 00072 __asm__ volatile ( 00073 "fxrstor %0" 00074 : "=m"(*fctx) 00075 ); 00076 } 00077 00078 /* 00079 Setup using fxsr instruction 00080 */ 00081 void fpu_fxsr(void) 00082 { 00083 fpu_save=fpu_context_fx_save; 00084 fpu_restore=fpu_context_fx_restore; 00085 } 00086 /* 00087 Setup using not fxsr instruction 00088 */ 00089 void fpu_fsr(void) 00090 { 00091 fpu_save=fpu_context_f_save; 00092 fpu_restore=fpu_context_f_restore; 00093 } 00094 00095 00096 00097 void fpu_context_save(fpu_context_t *fctx) 00098 { 00099 fpu_save(fctx); 00100 } 00101 00102 void fpu_context_restore(fpu_context_t *fctx) 00103 { 00104 fpu_restore(fctx); 00105 } 00106 00107 00108 00109 void fpu_init() 00110 { 00111 __u32 help0=0,help1=0; 00112 __asm__ volatile ( 00113 "fninit;\n" 00114 "stmxcsr %0\n" 00115 "mov %0,%1;\n" 00116 "or %2,%1;\n" 00117 "mov %1,%0;\n" 00118 "ldmxcsr %0;\n" 00119 :"+m"(help0),"+r"(help1) 00120 :"i"(0x1f80) 00121 ); 00122 } 00123