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00035 #ifndef __ia32_MEMSTR_H__
00036 #define __ia32_MEMSTR_H__
00037
00050 static inline void * memcpy(void * dst, const void * src, size_t cnt)
00051 {
00052 __native d0, d1, d2;
00053
00054 __asm__ __volatile__(
00055
00056 "rep movsl\n\t"
00057
00058 "movl %4, %%ecx\n\t"
00059
00060 "andl $3, %%ecx\n\t"
00061
00062 "jz 1f\n\t"
00063
00064 "rep movsb\n\t"
00065
00066 "1:\n"
00067 : "=&c" (d0), "=&D" (d1), "=&S" (d2)
00068 : "0" ((__native) (cnt / 4)), "g" ((__native) cnt), "1" ((__native) dst), "2" ((__native) src)
00069 : "memory");
00070
00071 return dst;
00072 }
00073
00074
00086 static inline int memcmp(const void * src, const void * dst, size_t cnt)
00087 {
00088 __u32 d0, d1, d2;
00089 int ret;
00090
00091 __asm__ (
00092 "repe cmpsb\n\t"
00093 "je 1f\n\t"
00094 "movl %3, %0\n\t"
00095 "addl $1, %0\n\t"
00096 "1:\n"
00097 : "=a" (ret), "=%S" (d0), "=&D" (d1), "=&c" (d2)
00098 : "0" (0), "1" ((__native) src), "2" ((__native) dst), "3" ((__native) cnt)
00099 );
00100
00101 return ret;
00102 }
00103
00113 static inline void memsetw(__address dst, size_t cnt, __u16 x)
00114 {
00115 __u32 d0, d1;
00116
00117 __asm__ __volatile__ (
00118 "rep stosw\n\t"
00119 : "=&D" (d0), "=&c" (d1), "=a" (x)
00120 : "0" (dst), "1" (cnt), "2" (x)
00121 : "memory"
00122 );
00123
00124 }
00125
00135 static inline void memsetb(__address dst, size_t cnt, __u8 x)
00136 {
00137 __u32 d0, d1;
00138
00139 __asm__ __volatile__ (
00140 "rep stosb\n\t"
00141 : "=&D" (d0), "=&c" (d1), "=a" (x)
00142 : "0" (dst), "1" (cnt), "2" (x)
00143 : "memory"
00144 );
00145
00146 }
00147
00148 #endif
00149