Changeset ffcc5776 in mainline for uspace/drv/bus/usb/ohci/ohci_regs.h
- Timestamp:
- 2012-02-23T06:00:07Z (12 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bfc5c9dd
- Parents:
- 70922c2
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
uspace/drv/bus/usb/ohci/ohci_regs.h
r70922c2 rffcc5776 35 35 #define DRV_OHCI_OHCI_REGS_H 36 36 #include <sys/types.h> 37 #include <byteorder.h> 38 39 40 /* assume OHCI regs are le */ 41 #define host2ohci_reg(value) host2uint32_t_le(value) 42 #define ohci_reg2host(value) uint32_t_le2host(value) 37 43 38 44 #define LEGACY_REGS_OFFSET 0x100 … … 41 47 typedef struct ohci_regs { 42 48 const ioport32_t revision; 43 #define R_REVISION_MASK (0x3f) 44 #define R_REVISION_SHIFT (0) 45 #define R_LEGACY_FLAG (0x80) 49 #define R_REVISION_(reg) (ohci_reg2host(reg) & 0x3f) 50 #define R_LEGACY_FLAG host2ohci_reg(0x80) 46 51 47 52 ioport32_t control; 48 #define C_CBSR_MASK (0x3)/* Control-bulk service ratio */53 /* Control-bulk service ratio */ 49 54 #define C_CBSR_1_1 (0x0) 50 55 #define C_CBSR_1_2 (0x1) 51 56 #define C_CBSR_1_3 (0x2) 52 57 #define C_CBSR_1_4 (0x3) 53 #define C_CBSR_SHIFT (0) 54 55 #define C_PLE (1 << 2) /* Periodic list enable */ 56 #define C_IE (1 << 3) /* Isochronous enable */ 57 #define C_CLE (1 << 4) /* Control list enable */ 58 #define C_BLE (1 << 5) /* Bulk list enable */ 59 60 #define C_HCFS_MASK (0x3) /* Host controller functional state */ 58 #define C_CBSR_GET(reg) (ohci_reg2host(reg) & 0x3) 59 #define C_CBSR_SET(reg, value) \ 60 do { \ 61 reg = (reg & host2ohci_reg(~0x3) | host2ohci_reg(value & 0x3)) \ 62 } while (0) 63 64 #define C_PLE host2ohci_reg(1 << 2) /* Periodic list enable */ 65 #define C_IE host2ohci_reg(1 << 3) /* Isochronous enable */ 66 #define C_CLE host2ohci_reg(1 << 4) /* Control list enable */ 67 #define C_BLE host2ohci_reg(1 << 5) /* Bulk list enable */ 68 69 /* Host controller functional state */ 61 70 #define C_HCFS_RESET (0x0) 62 71 #define C_HCFS_RESUME (0x1) 63 72 #define C_HCFS_OPERATIONAL (0x2) 64 73 #define C_HCFS_SUSPEND (0x3) 65 #define C_HCFS_SHIFT (6) 66 67 #define C_HCFS_GET(reg) \ 68 ((reg >> C_HCFS_SHIFT) & C_HCFS_MASK) 69 #define C_HCFS_SET(reg, hcfs_state) \ 74 #define C_HCFS_GET(reg) ((ohci_reg2host(reg) >> 6) & 0x3) 75 #define C_HCFS_SET(reg, value) \ 70 76 do { \ 71 reg = (reg & ~(C_HCFS_MASK << C_HCFS_SHIFT)) \72 | ((hcfs_state & C_HCFS_MASK) << C_HCFS_SHIFT); \77 reg = (reg & host2ohci_reg(~(0x3 << 6))) \ 78 | host2ohci_reg((value & 0x3) << 6); \ 73 79 } while (0) 74 80 75 76 #define C_IR (1 << 8) /* Interrupt routing, make sure it's 0 */ 77 #define C_RWC (1 << 9) /* Remote wakeup connected, host specific */ 78 #define C_RWE (1 << 10) /* Remote wakeup enable */ 81 #define C_IR host2ohci_reg(1 << 8) /* Interrupt routing, make sure it's 0 */ 82 #define C_RWC host2ohci_reg(1 << 9) /* Remote wakeup connected, host specific */ 83 #define C_RWE host2ohci_reg(1 << 10) /* Remote wakeup enable */ 79 84 80 85 ioport32_t command_status; 81 #define CS_HCR (1 << 0) /* Host controller reset */ 82 #define CS_CLF (1 << 1) /* Control list filled */ 83 #define CS_BLF (1 << 2) /* Bulk list filled */ 84 #define CS_OCR (1 << 3) /* Ownership change request */ 86 #define CS_HCR host2ohci_reg(1 << 0) /* Host controller reset */ 87 #define CS_CLF host2ohci_reg(1 << 1) /* Control list filled */ 88 #define CS_BLF host2ohci_reg(1 << 2) /* Bulk list filled */ 89 #define CS_OCR host2ohci_reg(1 << 3) /* Ownership change request */ 90 #if 0 85 91 #define CS_SOC_MASK (0x3) /* Scheduling overrun count */ 86 92 #define CS_SOC_SHIFT (16) 93 #endif 87 94 88 95 /** Interupt enable/disable/status, … … 93 100 ioport32_t interrupt_enable; 94 101 ioport32_t interrupt_disable; 95 #define I_SO (1 << 0) /* Scheduling overrun */96 #define I_WDH (1 << 1) /* Done head write-back */97 #define I_SF (1 << 2) /* Start of frame */98 #define I_RD (1 << 3) /* Resume detect */99 #define I_UE (1 << 4) /* Unrecoverable error */100 #define I_FNO (1 << 5) /* Frame number overflow */101 #define I_RHSC (1 << 6) /* Root hub status change */102 #define I_OC (1 << 30) /* Ownership change */103 #define I_MI (1 << 31) /* Master interrupt (all/any interrupts) */102 #define I_SO host2ohci_reg(1 << 0) /* Scheduling overrun */ 103 #define I_WDH host2ohci_reg(1 << 1) /* Done head write-back */ 104 #define I_SF host2ohci_reg(1 << 2) /* Start of frame */ 105 #define I_RD host2ohci_reg(1 << 3) /* Resume detect */ 106 #define I_UE host2ohci_reg(1 << 4) /* Unrecoverable error */ 107 #define I_FNO host2ohci_reg(1 << 5) /* Frame number overflow */ 108 #define I_RHSC host2ohci_reg(1 << 6) /* Root hub status change */ 109 #define I_OC host2ohci_reg(1 << 30) /* Ownership change */ 110 #define I_MI host2ohci_reg(1 << 31) /* Master interrupt (any/all) */ 104 111 105 112 /** HCCA pointer (see hw_struct hcca.h) */ … … 127 134 /** Frame time and max packet size for all transfers */ 128 135 ioport32_t fm_interval; 136 #define FMI_FL_GET(reg) (ohci_reg2host(reg) & 0x3fff) 137 #if 0 129 138 #define FMI_FI_MASK (0x3fff) /* Frame interval in bit times (should be 11999)*/ 130 139 #define FMI_FI_SHIFT (0) … … 132 141 #define FMI_FSMPS_SHIFT (16) 133 142 #define FMI_TOGGLE_FLAG (1 << 31) 143 #endif 134 144 135 145 /** Bit times remaining in current frame */ 136 146 const ioport32_t fm_remaining; 147 #define FMR_R_GET(reg) (ohci_reg2host(reg) & 0x3fff) 148 #if 0 137 149 #define FMR_FR_MASK FMI_FI_MASK 138 150 #define FMR_FR_SHIFT FMI_FI_SHIFT 139 151 #define FMR_TOGGLE_FLAG FMI_TOGGLE_FLAG 140 152 #endif 141 153 /** Frame number */ 142 154 const ioport32_t fm_number; 155 #if 0 143 156 #define FMN_NUMBER_MASK (0xffff) 144 157 #endif 145 158 /** Remaining bit time in frame to start periodic transfers */ 146 159 ioport32_t periodic_start; 147 #define PS_PS_MASK (0x3fff) /* bit time when periodic get priority (0x3e67) */ 160 #define PS_GET(reg) (ohci_reg2host(reg) & 0x3fff) 161 #define PS_SET(reg, value) \ 162 do { \ 163 reg = (reg & host2ohci_reg(~0x3fff)) | host2ohci_reg(value & 0x3fff); \ 164 } while (0) 148 165 149 166 /** Threshold for starting LS transaction */ 150 167 ioport32_t ls_threshold; 151 #define LST_LST_MASK (0x7fff)168 //#define LST_LST_MASK (0x7fff) 152 169 153 170 /** The first root hub control register */ 154 171 ioport32_t rh_desc_a; 155 #define RHDA_NDS_MASK (0xff) /* Number of downstream ports, max 15 */ 156 #define RHDA_NDS_SHIFT (0) 157 #define RHDA_PSM_FLAG (1 << 8) /* Power switching mode: 0-global, 1-per port*/ 158 #define RHDA_NPS_FLAG (1 << 9) /* No power switch: 1-power on, 0-use PSM*/ 159 #define RHDA_DT_FLAG (1 << 10) /* 1-Compound device, must be 0 */ 160 #define RHDA_OCPM_FLAG (1 << 11) /* Over-current mode: 0-global, 1-per port */ 161 #define RHDA_NOCP_FLAG (1 << 12) /* OC control: 0-use OCPM, 1-OC off */ 162 #define RHDA_POTPGT_MASK (0xff) /* Power on to power good time */ 163 #define RHDA_POTPGT_SHIFT (24) 172 /** Number of downstream ports, max 15 */ 173 #define RHDA_NDS(reg) (ohci_reg2host(reg) & 0xff) 174 /** Power switching mode: 0-global, 1-per port*/ 175 #define RHDA_PSM_FLAG host2ohci_reg(1 << 8) 176 /** No power switch: 1-power on, 0-use PSM*/ 177 #define RHDA_NPS_FLAG host2ohci_reg(1 << 9) 178 /** 1-Compound device, must be 0 */ 179 #define RHDA_DT_FLAG host2ohci_reg(1 << 10) 180 /** Over-current mode: 0-global, 1-per port */ 181 #define RHDA_OCPM_FLAG host2ohci_reg(1 << 11) 182 /** OC control: 0-use OCPM, 1-OC off */ 183 #define RHDA_NOCP_FLAG host2ohci_reg(1 << 12) 184 /** Power on to power good time */ 185 #define RHDA_POTPGT(reg) (ohci_reg2host(reg) >> 24) 164 186 165 187 /** The other root hub control register */ 166 188 ioport32_t rh_desc_b; 167 #define RHDB_DR_MASK (0xffff) /* Device removable mask */ 168 #define RHDB_DR_SHIFT (0) 169 #define RHDB_PCC_MASK (0xffff) /* Power control mask */ 170 #define RHDB_PCC_SHIFT (16) 171 189 /** Device removable mask */ 190 #define RHDB_DR_READ(reg) (ohci_reg2host(reg) & 0xffff) 191 #define RHDB_DR_WRITE(val) host2ohci_reg(val & 0xffff) 192 /** Power control mask */ 193 #define RHDB_PCC_READ(reg) (ohci_reg2host(reg) >> 16) 194 #define RHDB_PCC_WRITE(val) host2ohci_reg(val << 16) 172 195 /* Port device removable status */ 173 #define RHDB_DR_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 196 #define RHDB_DR_FLAG(port) \ 197 host2ohci_reg(((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 174 198 /* Port power control status: 1-per port power control, 0-global power switch */ 175 #define RHDB_PPC_FLAG(port) (((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 199 #define RHDB_PPC_FLAG(port) \ 200 host2ohci_reg(((1 << port) & RHDB_DR_MASK) << RHDB_DR_SHIFT) 176 201 177 202 /** Root hub status register */ 178 203 ioport32_t rh_status; 179 #define RHS_LPS_FLAG (1 << 0)/* read: 0, 180 * write: 0-no effect, 181 * 1-turn off port power for ports 182 * specified in PPCM(RHDB), or all ports, 183 * if power is set globally */ 204 /* read: 0, 205 * write: 0-no effect, 206 * 1-turn off port power for ports 207 * specified in PPCM(RHDB), or all ports, 208 * if power is set globally */ 209 #define RHS_LPS_FLAG host2ohci_reg(1 << 0) 184 210 #define RHS_CLEAR_GLOBAL_POWER RHS_LPS_FLAG /* synonym for the above */ 185 #define RHS_OCI_FLAG (1 << 1)/* Over-current indicator, if per-port: 0 */ 186 #define RHS_DRWE_FLAG (1 << 15)/* read: 0-connect status change does not wake HC 187 * 1-connect status change wakes HC 188 * write: 1-set DRWE, 0-no effect */ 211 /** Over-current indicator, if per-port: 0 */ 212 #define RHS_OCI_FLAG host2ohci_reg(1 << 1) 213 214 /* read: 0-connect status change does not wake HC 215 * 1-connect status change wakes HC 216 * write: 1-set DRWE, 0-no effect */ 217 #define RHS_DRWE_FLAG host2ohci_reg(1 << 15) 189 218 #define RHS_SET_DRWE RHS_DRWE_FLAG 190 #define RHS_LPSC_FLAG (1 << 16)/* read: 0, 191 * write: 0-no effect 192 * 1-turn on port power for ports 193 * specified in PPCM(RHDB), or all ports, 194 * if power is set globally */ 219 /* read: 0, 220 * write: 0-no effect 221 * 1-turn on port power for ports 222 * specified in PPCM(RHDB), or all ports, 223 * if power is set globally */ 224 #define RHS_LPSC_FLAG host2ohci_reg(1 << 16) 195 225 #define RHS_SET_GLOBAL_POWER RHS_LPSC_FLAG /* synonym for the above */ 196 #define RHS_OCIC_FLAG (1 << 17)/* Over-current indicator change */ 197 #define RHS_CLEAR_DRWE (1 << 31) 226 /** Over-current change indicator*/ 227 #define RHS_OCIC_FLAG host2ohci_reg(1 << 17) 228 #define RHS_CLEAR_DRWE host2ohci_reg(1 << 31) 198 229 199 230 /** Root hub per port status */ 200 231 ioport32_t rh_port_status[]; 201 #define RHPS_CCS_FLAG (1 << 0) /* r: current connect status,202 * w: 1-clear port enable, 0-nothing*/232 #define RHPS_CCS_FLAG host2ohci_reg(1 << 0) /* r: current connect status, 233 * w: 1-clear port enable, 0-N/S*/ 203 234 #define RHPS_CLEAR_PORT_ENABLE RHPS_CCS_FLAG 204 #define RHPS_PES_FLAG (1 << 1) /* r: port enable status205 * w: 1-set port enable, 0-nothing*/235 #define RHPS_PES_FLAG host2ohci_reg(1 << 1) /* r: port enable status 236 * w: 1-set port enable, 0-N/S */ 206 237 #define RHPS_SET_PORT_ENABLE RHPS_PES_FLAG 207 #define RHPS_PSS_FLAG (1 << 2) /* r: port suspend status208 * w: 1-set port suspend, 0-nothing*/238 #define RHPS_PSS_FLAG host2ohci_reg(1 << 2) /* r: port suspend status 239 * w: 1-set port suspend, 0-N/S */ 209 240 #define RHPS_SET_PORT_SUSPEND RHPS_PSS_FLAG 210 #define RHPS_POCI_FLAG (1 << 3) /* r: port over-current (if reports are per-port 211 * w: 1-clear port suspend (start resume 212 * if suspened) 213 * 0-nothing */ 241 #define RHPS_POCI_FLAG host2ohci_reg(1 << 3) /* r: port over-current 242 * (if reports are per-port 243 * w: 1-clear port suspend 244 * (start resume if suspened) 245 * 0-nothing */ 214 246 #define RHPS_CLEAR_PORT_SUSPEND RHPS_POCI_FLAG 215 #define RHPS_PRS_FLAG (1 << 4) /* r: port reset status216 * w: 1-set port reset, 0-nothing*/247 #define RHPS_PRS_FLAG host2ohci_reg(1 << 4) /* r: port reset status 248 * w: 1-set port reset, 0-N/S */ 217 249 #define RHPS_SET_PORT_RESET RHPS_PRS_FLAG 218 #define RHPS_PPS_FLAG (1 << 8) /* r: port power status219 * w: 1-set port power, 0-nothing*/250 #define RHPS_PPS_FLAG host2ohci_reg(1 << 8) /* r: port power status 251 * w: 1-set port power, 0-N/S */ 220 252 #define RHPS_SET_PORT_POWER RHPS_PPS_FLAG 221 #define RHPS_LSDA_FLAG (1 << 9) /* r: low speed device attached222 * w: 1-clear port power, 0-nothing*/253 #define RHPS_LSDA_FLAG host2ohci_reg(1 << 9) /* r: low speed device attached 254 * w: 1-clear port power, 0-N/S*/ 223 255 #define RHPS_CLEAR_PORT_POWER RHPS_LSDA_FLAG 224 #define RHPS_CSC_FLAG (1 << 16) /* connect status change Write-Clean */ 225 #define RHPS_PESC_FLAG (1 << 17) /* port enable status change WC */ 226 #define RHPS_PSSC_FLAG (1 << 18) /* port suspend status change WC */ 227 #define RHPS_OCIC_FLAG (1 << 19) /* port over-current change WC */ 228 #define RHPS_PRSC_FLAG (1 << 20) /* port reset status change WC */ 229 #define RHPS_CHANGE_WC_MASK 0x1f0000 256 #define RHPS_CSC_FLAG host2ohci_reg(1 << 16) /* connect status change WC */ 257 #define RHPS_PESC_FLAG host2ohci_reg(1 << 17) /* port enable status change WC */ 258 #define RHPS_PSSC_FLAG host2ohci_reg(1 << 18) /* port suspend status change WC */ 259 #define RHPS_OCIC_FLAG host2ohci_reg(1 << 19) /* port over-current change WC */ 260 #define RHPS_PRSC_FLAG host2ohci_reg(1 << 20) /* port reset status change WC */ 261 #define RHPS_CHANGE_WC_MASK host2ohci_reg(0x1f0000) 262 /** OHCI designers were kind enough to make bits correspond to feature # */ 263 #define RHPS_FEATURE_BIT(feature) host2ohci_reg(1 << feature) 230 264 } __attribute__((packed)) ohci_regs_t; 231 265 #endif
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