Ignore:
Timestamp:
2015-11-02T20:54:19Z (8 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
d8513177
Parents:
3feeab2 (diff), 5265eea4 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

File:
1 edited

Legend:

Unmodified
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  • kernel/arch/arm32/include/arch/mm/page.h

    r3feeab2 rff381a7  
    154154{
    155155        uint32_t val = (uint32_t)pt & TTBR_ADDR_MASK;
     156#if defined(PROCESSOR_ARCH_armv6) || defined(PROCESSOR_ARCH_armv7_a)
     157        // FIXME: TTBR_RGN_WBWA_CACHE is unpredictable on ARMv6
    156158        val |= TTBR_RGN_WBWA_CACHE | TTBR_C_FLAG;
     159#endif
    157160        TTBR0_write(val);
    158161}
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