Changeset f9f758e in mainline

Timestamp:

2013-08-05T22:09:36Z (11 years ago)

Author:

Jan Vesely <jano.vesely@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

e13ba75

Parents:

8abcf4e

Message:

armv7: Use write-through caches.

Works correctly and still offers significant improvement

Files:

• boot/arch/arm32/src/mm.c (modified) (1 diff)
• kernel/arch/arm32/include/arch/mm/page_armv6.h (modified) (1 diff)

boot/arch/arm32/src/mm.c

@@ -136 +136 @@
 {
         pte->descriptor_type = PTE_DESCRIPTOR_SECTION;
-        pte->bufferable = 1;
-        pte->cacheable = section_cacheable(frame);
         pte->xn = 0;
         pte->domain = 0;
         pte->should_be_zero_1 = 0;
         pte->access_permission_0 = PTE_AP_USER_NO_KERNEL_RW;
+#ifdef PROCESSOR_ARCH_armv7_a
+        //TODO: Use write-back write-allocate caches
+        pte->tex = section_cacheable(frame) ? 6 : 0;
+        pte->bufferable = section_cacheable(frame) ? 0 : 0;
+        pte->cacheable = section_cacheable(frame) ? 1 : 0;
+#else
+        pte->bufferable = 1;
+        pte->cacheable = section_cacheable(frame);
         pte->tex = 0;
+#endif
         pte->access_permission_1 = 0;
         pte->shareable = 0;

kernel/arch/arm32/include/arch/mm/page_armv6.h

@@ -236 +236 @@
         if (flags & PAGE_CACHEABLE) {
                 /*
-                 * Write-back, write-allocate memory, see ch. B3.8.2
+                 * Write-through, no write-allocate memory, see ch. B3.8.2
                  * (p. B3-1358) of ARM Architecture reference manual.
                  */
-                p->tex = 1;
+                //TODO: Use writeback, write-allocate caches
+                p->tex = 6;
                 p->cacheable = 1;
-                p->bufferable = 1;
+                p->bufferable = 0;
         } else {
                 /*