Changeset f94b95b1 in mainline


Ignore:
Timestamp:
2012-09-18T13:22:16Z (12 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
4bd3f45
Parents:
25d5c96
Message:

arm32: Don't use unaligned access in boot or kernel.

Allow unaligned access for uspace.

Files:
3 edited

Legend:

Unmodified
Added
Removed

  • boot/arch/arm32/Makefile.inc

    r25d5c96 rf94b95b1  
    4949BITS = 32
    5050ENDIANESS = LE
    51 EXTRA_CFLAGS = -march=$(subst _,-,$(PROCESSOR))
     51EXTRA_CFLAGS = -march=$(subst _,-,$(PROCESSOR)) -mno-unaligned-access
    5252
    5353ifeq ($(MACHINE), gta02)

  • kernel/arch/arm32/Makefile.inc

    r25d5c96 rf94b95b1  
    3333ATSIGN = %
    3434
    35 GCC_CFLAGS += -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR))
     35GCC_CFLAGS += -fno-omit-frame-pointer -mapcs-frame -march=$(subst _,-,$(PROCESSOR)) -mno-unaligned-access
    3636
    3737BITS = 32

  • kernel/arch/arm32/src/cpu/cpu.c

    r25d5c96 rf94b95b1  
    100100void cpu_arch_init(void)
    101101{
    102 #if defined(PROCESSOR_armv7_a)
     102#if defined(PROCESSOR_armv7_a) | defined(PROCESSOR_armv6)
    103103        uint32_t control_reg = 0;
    104104        asm volatile (
    … …  
    110110        control_reg &= ~CP15_R1_TRE_BIT;
    111111        /* Turn off accessed flag */
    112         control_reg &= ~(CP15_R1_AFE_BIT | CP15_R1_HA_ENABLE_BIT);
     112        control_reg &= ~(CP15_R1_AFE_BIT | CP15_R1_HA_ENABLE_BIT | CP15_R1_ALIGNMENT_ENABLE_BIT);
    113113        /* Enable caching */
    114114        control_reg |= CP15_R1_CACHE_ENABLE_BIT;
    … …  
    122122
    123123/** Retrieves processor identification and stores it to #CPU.arch */
    124 void cpu_identify(void) 
     124void cpu_identify(void)
    125125{
    126126        arch_cpu_identify(&CPU->arch);
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