Changeset f6f22cdb in mainline for boot/arch/sparc32/include/arch.h


Ignore:
Timestamp:
2013-12-27T18:45:56Z (10 years ago)
Author:
Martin Decky <martin@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
32e8cd1
Parents:
e47ed05
Message:

code revision
coding style changes

File:
1 edited

Legend:

Unmodified
Added
Removed
  • boot/arch/sparc32/include/arch.h

    re47ed05 rf6f22cdb  
    3030#define BOOT_sparc32_ARCH_H
    3131
    32 #define PTL0_ENTRIES    256
    33 #define PTL0_SHIFT      24
    34 #define PTL0_SIZE       (1 << 24)
    35 #define PTL0_ENTRY_SIZE 4
     32#define PTL0_ENTRIES     256
     33#define PTL0_SHIFT       24
     34#define PTL0_SIZE        (1 << 24)
     35#define PTL0_ENTRY_SIZE  4
    3636
    3737/* ASI assignments: */
    38 #define ASI_CACHEMISS   0x01
    39 #define ASI_CACHECTRL   0x02
    40 #define ASI_MMUREGS     0x19
    41 #define ASI_MMUBYPASS   0x1c
     38#define ASI_CACHEMISS  0x01
     39#define ASI_CACHECTRL  0x02
     40#define ASI_MMUREGS    0x19
     41#define ASI_MMUBYPASS  0x1c
    4242
    4343/*
    44  * Address where the boot stage image starts (beginning of usable physical
    45  * memory).
     44 * Address where the boot stage image starts
     45 * (beginning of usable physical memory).
    4646 */
    47 #define BOOT_BASE       0x40000000
    48 #define BOOT_OFFSET     (BOOT_BASE + 0xa00000)
    4947
    50 #define PA_OFFSET 0x40000000
     48#define BOOT_BASE   0x40000000
     49#define BOOT_OFFSET (BOOT_BASE + 0xa00000)
     50
     51#define PA_OFFSET  0x40000000
    5152
    5253#ifndef __ASM__
     
    5657#endif
    5758
    58 
    5959#endif
    6060
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