Changeset f3dbe27 in mainline for kernel/arch/ia32/src/cpu/cpu.c


Ignore:
Timestamp:
2023-04-18T17:33:02Z (8 months ago)
Author:
Jiří Zárevúcky <zarevucky.jiri@…>
Branches:
master, ticket/834-toolchain-update, topic/msim-upgrade
Children:
117ad5a2
Parents:
06f81c4
git-author:
Jiří Zárevúcky <zarevucky.jiri@…> (2023-04-18 17:27:32)
git-committer:
Jiří Zárevúcky <zarevucky.jiri@…> (2023-04-18 17:33:02)
Message:

Reduce locking further with lazy FPU

It turns out we only need a lock to synchronize between the trap
handler and thread destructor. The atomic operations introduced
are just plain reads and writes, written in an ugly fashion to
appease C11 undefined behavior gods.

In principle we could get rid of that if we made cpu_t::fpu_owner
a strong reference, but that would mean a thread structure could
be held in limbo indefinitely if a new thread is not being
scheduled or doesn't use FPU.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/arch/ia32/src/cpu/cpu.c

    r06f81c4 rf3dbe27  
    8787        CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((uint8_t *) CPU->arch.tss);
    8888
    89         CPU->fpu_owner = NULL;
    90 
    9189        cpuid(INTEL_CPUID_STANDARD, &info);
    9290
Note: See TracChangeset for help on using the changeset viewer.