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Changeset ef1a3a8 in mainline for uspace/drv/bus/usb/xhci/endpoint.h


Ignore:
Timestamp:
2017-10-29T11:53:45Z (4 years ago)
Author:
Petr Manek <petr.manek@…>
Branches:
lfn, master
Children:
a312d8f
Parents:
d33dc78
Message:

Added memory structure for stream TRB rings. Implemented their initialization. Fixed white space.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/xhci/endpoint.h

    rd33dc78 ref1a3a8  
    7474        xhci_transfer_t active_transfer;
    7575
    76         /** Primary stream context array (or NULL if endpoint doesn't use streams) */
     76        /** Primary stream context array (or NULL if endpoint doesn't use streams). */
    7777        xhci_stream_ctx_t *primary_stream_ctx_array;
    7878
    79         /** Size of the allocated primary stream context array. */
     79        /** Primary stream ring array (or NULL if endpoint doesn't use streams). */
     80        xhci_trb_ring_t *primary_stream_rings;
     81
     82        /** Size of the allocated primary stream context array (and ring array). */
    8083        uint16_t primary_stream_ctx_array_size;
    8184
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