Changes in uspace/drv/uhci-hcd/pci.c [17ceb72:ea993d18] in mainline

File:

• uspace/drv/uhci-hcd/pci.c (modified) (5 diffs)

uspace/drv/uhci-hcd/pci.c

@@ -44 +44 @@
 #include "pci.h"
 
-/** Get address of registers and IRQ for given device.
+/** Get I/O address of registers and IRQ for given device.
  *
  * @param[in] dev Device asking for the addresses.
@@ -53 +53 @@
  */
 int pci_get_my_registers(ddf_dev_t *dev,
-    uintptr_t *io_reg_address, size_t *io_reg_size,
-    int *irq_no)
+    uintptr_t *io_reg_address, size_t *io_reg_size, int *irq_no)
 {
         assert(dev != NULL);
 
-        int parent_phone = devman_parent_device_connect(dev->handle,
-            IPC_FLAG_BLOCKING);
+        int parent_phone =
+            devman_parent_device_connect(dev->handle, IPC_FLAG_BLOCKING);
         if (parent_phone < 0) {
                 return parent_phone;
         }
 
-        int rc;
         hw_resource_list_t hw_resources;
-        rc = hw_res_get_resource_list(parent_phone, &hw_resources);
+        int rc = hw_res_get_resource_list(parent_phone, &hw_resources);
         if (rc != EOK) {
                 goto leave;
@@ -95 +93 @@
                             res->res.io_range.address, res->res.io_range.size);
                         io_found = true;
+                        break;
 
                 default:
@@ -113 +112 @@
 leave:
         async_hangup(parent_phone);
-
         return rc;
 }
@@ -145 +143 @@
         }
 
-        /* See UHCI design guide for these values,
+        /* See UHCI design guide for these values p.45,
          * write all WC bits in USB legacy register */
         sysarg_t address = 0xc0;