Changeset e762b43 in mainline for kernel/arch/arm32/src/mm/page_fault.c

Timestamp:

2009-03-03T16:12:43Z (15 years ago)

Author:

Martin Decky <martin@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

02fd705

Parents:

f24d300

Message:

better inline assembler readability using the new symbolic syntax

File:

• kernel/arch/arm32/src/mm/page_fault.c (modified) (4 diffs)

kernel/arch/arm32/src/mm/page_fault.c

@@ -50 +50 @@
 {
         fault_status_union_t fsu;
-
+        
         /* fault status is stored in CP15 register 5 */
         asm volatile (
-                "mrc p15, 0, %0, c5, c0, 0"
-                : "=r"(fsu.dummy)
+                "mrc p15, 0, %[dummy], c5, c0, 0"
+                : [dummy] "=r" (fsu.dummy)
         );
+        
         return fsu.fs;
 }
@@ -62 +63 @@
  *
  * @return FAR (fault address register) content (address that caused a page
- *         fault)
+ *         fault)
  */
 static inline uintptr_t read_fault_address_register(void)
 {
         uintptr_t ret;
-
+        
         /* fault adress is stored in CP15 register 6 */
         asm volatile (
-                "mrc p15, 0, %0, c6, c0, 0"
-                : "=r"(ret)
+                "mrc p15, 0, %[ret], c6, c0, 0"
+                : [ret] "=r" (ret)
         );
+        
         return ret;
 }
@@ -81 +83 @@
  *
  * @return true when instruction is load/store, false otherwise
+ *
  */
 static inline bool is_load_store_instruction(instruction_t instr)
 {
         /* load store immediate offset */
-        if (instr.type == 0x2) {
-                return true;
-        }
-
+        if (instr.type == 0x2)
+                return true;
+        
         /* load store register offset */
-        if (instr.type == 0x3 && instr.bit4 == 0) {
-                return true;
-        }
-
+        if ((instr.type == 0x3) && (instr.bit4 == 0))
+                return true;
+        
         /* load store multiple */
-        if (instr.type == 0x4) {
-                return true;
-        }
-
+        if (instr.type == 0x4)
+                return true;
+        
         /* oprocessor load/store */
-        if (instr.type == 0x6) {
-                return true;
-        }
-
+        if (instr.type == 0x6)
+                return true;
+        
         return false;
 }
@@ -116 +115 @@
 {
         /* swap, swapb instruction */
-        if (instr.type == 0x0 &&
-            (instr.opcode == 0x8 || instr.opcode == 0xa) &&
-            instr.access == 0x0 && instr.bits567 == 0x4 && instr.bit4 == 1) {
-                return true;
-        }
-
+        if ((instr.type == 0x0) &&
+            ((instr.opcode == 0x8) || (instr.opcode == 0xa)) &&
+            (instr.access == 0x0) && (instr.bits567 == 0x4) && (instr.bit4 == 1))
+                return true;
+        
         return false;
 }