Changeset dc0b964 in mainline for kernel/arch/ia32/src/smp/apic.c
- Timestamp:
- 2010-11-24T14:23:14Z (13 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- 85369b1, b89e1d3
- Parents:
- 8b3bff5
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/ia32/src/smp/apic.c
r8b3bff5 rdc0b964 72 72 * 73 73 */ 74 volatile uint32_t *l_apic = (uint32_t *) 0xfee00000;75 volatile uint32_t *io_apic = (uint32_t *) 0xfec00000;74 volatile uint32_t *l_apic = (uint32_t *) UINT32_C(0xfee00000); 75 volatile uint32_t *io_apic = (uint32_t *) UINT32_C(0xfec00000); 76 76 77 77 uint32_t apic_id_mask = 0; … … 184 184 * Other interrupts will be forwarded to the lowest priority CPU. 185 185 */ 186 io_apic_disable_irqs(0xffff );186 io_apic_disable_irqs(0xffffU); 187 187 188 188 irq_initialize(&l_apic_timer_irq);
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