Changes in uspace/drv/pciintel/pci.c [663f41c4:d93aafed] in mainline
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uspace/drv/pciintel/pci.c
r663f41c4 rd93aafed 65 65 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 66 66 67 if ( NULL == dev_data)67 if (dev_data == NULL) 68 68 return NULL; 69 69 return &dev_data->hw_resources; … … 109 109 110 110 bus_data = (pci_bus_data_t *) malloc(sizeof(pci_bus_data_t)); 111 if ( NULL != bus_data) {111 if (bus_data != NULL) { 112 112 memset(bus_data, 0, sizeof(pci_bus_data_t)); 113 113 fibril_mutex_initialize(&bus_data->conf_mutex); 114 114 } 115 115 116 return bus_data; 116 117 } … … 123 124 static void pci_conf_read(device_t *dev, int reg, uint8_t *buf, size_t len) 124 125 { 125 assert( NULL != dev->parent);126 assert(dev->parent != NULL); 126 127 127 128 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; … … 153 154 static void pci_conf_write(device_t *dev, int reg, uint8_t *buf, size_t len) 154 155 { 155 assert( NULL != dev->parent);156 assert(dev->parent != NULL); 156 157 157 158 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; … … 224 225 225 226 match_id = create_match_id(); 226 if ( NULL != match_id) {227 if (match_id != NULL) { 227 228 asprintf(&match_id_str, "pci/ven=%04x&dev=%04x", 228 229 dev_data->vendor_id, dev_data->device_id); … … 230 231 match_id->score = 90; 231 232 add_match_id(&dev->match_ids, match_id); 232 } 233 } 234 233 235 /* TODO add more ids (with subsys ids, using class id etc.) */ 234 236 } … … 242 244 size_t count = hw_res_list->count; 243 245 244 assert( NULL != hw_resources);246 assert(hw_resources != NULL); 245 247 assert(count < PCI_MAX_HW_RES); 246 248 … … 275 277 bool io; 276 278 /* 64-bit wide address */ 277 bool w64;279 bool addrw64; 278 280 279 281 /* Size of the io or memory range specified by the BAR */ … … 287 289 io = (bool) (val & 1); 288 290 if (io) { 289 w64 = false;291 addrw64 = false; 290 292 } else { 291 293 switch ((val >> 1) & 3) { 292 294 case 0: 293 w64 = false;295 addrw64 = false; 294 296 break; 295 297 case 2: 296 w64 = true;298 addrw64 = true; 297 299 break; 298 300 default: … … 312 314 range_size = pci_bar_mask_to_size(mask); 313 315 314 if ( w64) {316 if (addrw64) { 315 317 range_addr = ((uint64_t)pci_conf_read_32(dev, addr + 4) << 32) | 316 318 (val & 0xfffffff0); … … 319 321 } 320 322 321 if ( 0 != range_addr) {323 if (range_addr != 0) { 322 324 printf(NAME ": device %s : ", dev->name); 323 325 printf("address = %x", range_addr); … … 327 329 pci_add_range(dev, range_addr, range_size, io); 328 330 329 if ( w64)331 if (addrw64) 330 332 return addr + 8; 331 333 … … 354 356 { 355 357 uint8_t irq = pci_conf_read_8(dev, PCI_BRIDGE_INT_LINE); 356 if ( 0xff != irq)358 if (irq != 0xff) 357 359 pci_add_interrupt(dev, irq); 358 360 } … … 415 417 create_pci_match_ids(dev); 416 418 417 if ( EOK != child_device_register(dev, parent)) {419 if (child_device_register(dev, parent) != EOK) { 418 420 pci_clean_resource_list(dev); 419 421 clean_match_ids(&dev->match_ids); … … 424 426 425 427 if (header_type == PCI_HEADER_TYPE_BRIDGE || 426 header_type == PCI_HEADER_TYPE_CARDBUS 428 header_type == PCI_HEADER_TYPE_CARDBUS) { 427 429 child_bus = pci_conf_read_8(dev, 428 430 PCI_BRIDGE_SEC_BUS_NUM); 429 431 printf(NAME ": device is pci-to-pci bridge, " 430 432 "secondary bus number = %d.\n", bus_num); 431 if (child_bus > bus_num)433 if (child_bus > bus_num) 432 434 pci_bus_scan(parent, child_bus); 433 435 } … … 453 455 454 456 pci_bus_data_t *bus_data = create_pci_bus_data(); 455 if ( NULL == bus_data) {457 if (bus_data == NULL) { 456 458 printf(NAME ": pci_add_device allocation failed.\n"); 457 459 return ENOMEM; … … 513 515 } 514 516 517 pci_dev_data_t *create_pci_dev_data(void) 518 { 519 pci_dev_data_t *res = (pci_dev_data_t *) malloc(sizeof(pci_dev_data_t)); 520 521 if (res != NULL) 522 memset(res, 0, sizeof(pci_dev_data_t)); 523 return res; 524 } 525 526 void init_pci_dev_data(pci_dev_data_t *dev_data, int bus, int dev, int fn) 527 { 528 dev_data->bus = bus; 529 dev_data->dev = dev; 530 dev_data->fn = fn; 531 } 532 533 void delete_pci_dev_data(pci_dev_data_t *dev_data) 534 { 535 if (dev_data != NULL) { 536 clean_hw_resource_list(&dev_data->hw_resources); 537 free(dev_data); 538 } 539 } 540 541 void create_pci_dev_name(device_t *dev) 542 { 543 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 544 char *name = NULL; 545 546 asprintf(&name, "%02x:%02x.%01x", dev_data->bus, dev_data->dev, 547 dev_data->fn); 548 dev->name = name; 549 } 550 551 bool pci_alloc_resource_list(device_t *dev) 552 { 553 pci_dev_data_t *dev_data = (pci_dev_data_t *)dev->driver_data; 554 555 dev_data->hw_resources.resources = 556 (hw_resource_t *) malloc(PCI_MAX_HW_RES * sizeof(hw_resource_t)); 557 return dev_data->hw_resources.resources != NULL; 558 } 559 560 void pci_clean_resource_list(device_t *dev) 561 { 562 pci_dev_data_t *dev_data = (pci_dev_data_t *) dev->driver_data; 563 564 if (dev_data->hw_resources.resources != NULL) { 565 free(dev_data->hw_resources.resources); 566 dev_data->hw_resources.resources = NULL; 567 } 568 } 569 570 /** Read the base address registers (BARs) of the device and adds the addresses 571 * to its hw resource list. 572 * 573 * @param dev the pci device. 574 */ 575 void pci_read_bars(device_t *dev) 576 { 577 /* 578 * Position of the BAR in the PCI configuration address space of the 579 * device. 580 */ 581 int addr = PCI_BASE_ADDR_0; 582 583 while (addr <= PCI_BASE_ADDR_5) 584 addr = pci_read_bar(dev, addr); 585 } 586 587 size_t pci_bar_mask_to_size(uint32_t mask) 588 { 589 return ((mask & 0xfffffff0) ^ 0xffffffff) + 1; 590 } 591 515 592 int main(int argc, char *argv[]) 516 593 {
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