Changeset d92bf462 in mainline for kernel/arch/mips32/src/start.S
- Timestamp:
- 2010-05-22T22:31:17Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- ba7371f9
- Parents:
- d354d57
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
kernel/arch/mips32/src/start.S
rd354d57 rd92bf462 47 47 # Which status bits should are thread-local 48 48 #define REG_SAVE_MASK 0x1f # KSU(UM), EXL, ERL, IE 49 49 50 50 # Save registers to space defined by \r 51 # We will change status: Disable ERL, EXL,UM,IE51 # We will change status: Disable ERL, EXL, UM, IE 52 52 # These changes will be automatically reversed in REGISTER_LOAD 53 # SPis NOT saved as part of these registers53 # %sp is NOT saved as part of these registers 54 54 .macro REGISTERS_STORE_AND_EXC_RESET r 55 55 sw $at, EOFFSET_AT(\r) … … 70 70 sw $t8, EOFFSET_T8(\r) 71 71 sw $t9, EOFFSET_T9(\r) 72 72 73 73 mflo $at 74 74 sw $at, EOFFSET_LO(\r) … … 79 79 sw $ra, EOFFSET_RA(\r) 80 80 sw $k1, EOFFSET_K1(\r) 81 81 82 82 mfc0 $t0, $status 83 83 mfc0 $t1, $epc 84 84 85 and $t2, $t0, REG_SAVE_MASK # Save only KSU,EXL,ERL,IE 86 li $t3, ~(0x1f) 87 and $t0, $t0, $t3 # Clear KSU,EXL,ERL,IE 88 89 sw $t2,EOFFSET_STATUS(\r) 90 sw $t1,EOFFSET_EPC(\r) 85 # save only KSU, EXL, ERL, IE 86 and $t2, $t0, REG_SAVE_MASK 87 88 # clear KSU, EXL, ERL, IE 89 li $t3, ~(REG_SAVE_MASK) 90 and $t0, $t0, $t3 91 92 sw $t2, EOFFSET_STATUS(\r) 93 sw $t1, EOFFSET_EPC(\r) 91 94 mtc0 $t0, $status 92 95 .endm 93 96 94 97 .macro REGISTERS_LOAD r 95 # Update only UM, EXR,IE from status, the rest98 # Update only UM, EXR, IE from status, the rest 96 99 # is controlled by OS and not bound to task 97 100 mfc0 $t0, $status 98 101 lw $t1,EOFFSET_STATUS(\r) 99 100 li $t2, ~REG_SAVE_MASK # Mask UM,EXL,ERL,IE 102 103 # Mask UM, EXL, ERL, IE 104 li $t2, ~REG_SAVE_MASK 101 105 and $t0, $t0, $t2 102 106 103 or $t0, $t0, $t1 # Copy UM,EXL, ERL, IE from saved status 107 # Copy UM, EXL, ERL, IE from saved status 108 or $t0, $t0, $t1 104 109 mtc0 $t0, $status 105 110 … … 129 134 lw $at, EOFFSET_HI(\r) 130 135 mthi $at 131 136 132 137 lw $at, EOFFSET_EPC(\r) 133 138 mtc0 $at, $epc … … 138 143 139 144 # Move kernel stack pointer address to register K0 140 # - if we are in user mode, load the appropriate stack 141 # address 145 # - if we are in user mode, load the appropriate stack address 142 146 .macro KERNEL_STACK_TO_K0 143 # If we are in user mode147 # if we are in user mode 144 148 mfc0 $k0, $status 145 149 andi $k0, 0x10 … … 148 152 add $k0, $sp, 0 149 153 150 # Move $k0 pointer to kernel stack154 # move $k0 pointer to kernel stack 151 155 lui $k0, %hi(supervisor_sp) 152 156 ori $k0, $k0, %lo(supervisor_sp) 153 # Move $k0 (superveisor_sp) 157 158 # move $k0 (supervisor_sp) 154 159 lw $k0, 0($k0) 155 1: 160 161 1: 156 162 .endm 157 163 158 164 .org 0x0 159 165 kernel_image_start: 160 /* Load temporary stack */166 # load temporary stack 161 167 lui $sp, %hi(end_stack) 162 168 ori $sp, $sp, %lo(end_stack) 163 169 164 /*Not sure about this, but might165 be needed for PIC code */170 # Not sure about this, but might 171 # be needed for PIC code 166 172 lui $gp, 0x8000 167 173 168 /* $a1 contains physical address of bootinfo_t */ 169 174 # $a1 contains physical address of bootinfo_t 170 175 jal arch_pre_main 171 176 nop … … 174 179 nop 175 180 176 181 .space TEMP_STACK_SIZE 177 182 end_stack: 178 183 … … 191 196 exception_handler: 192 197 KERNEL_STACK_TO_K0 198 193 199 sub $k0, REGISTER_SPACE 194 200 sw $sp, EOFFSET_SP($k0) … … 209 215 jal exc_dispatch # exc_dispatch(excno, register_space) 210 216 move $a0, $k0 211 217 212 218 REGISTERS_LOAD $sp 213 219 # The $sp is automatically restored to former value … … 276 282 277 283 eret 278 284 279 285 tlb_refill_handler: 280 286 KERNEL_STACK_TO_K0
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