Changeset d704d7f in mainline


Ignore:
Timestamp:
2012-12-11T22:06:43Z (11 years ago)
Author:
Jakub Jermar <jakub@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
cf538e7
Parents:
3f69f63d
Message:

MIPS R4000 and 4Kc have different widths of the TLB index.

  • 6 bits for R4000
  • 4 bits for 4Kc
File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/mips32/include/mm/tlb.h

    r3f69f63d rd704d7f  
    4343#if defined(PROCESSOR_R4000)
    4444#define TLB_ENTRY_COUNT  48
     45#define TLB_INDEX_BITS   6
    4546#elif defined(PROCESSOR_4Kc)
    4647#define TLB_ENTRY_COUNT  16
     48#define TLB_INDEX_BITS   4
    4749#else
    4850#error Please define TLB_ENTRY_COUNT for the target processor.
    … …  
    118120#ifdef __BE__
    119121                unsigned p : 1;
    120                 unsigned : 27;
    121                 unsigned index : 4;
     122                unsigned : 32 - TLB_INDEX_BITS - 1;
     123                unsigned index : TLB_INDEX_BITS;
    122124#else
    123                 unsigned index : 4;
    124                 unsigned : 27;
     125                unsigned index : TLB_INDEX_BITS;
     126                unsigned : 32 - TLB_INDEX_BITS - 1;
    125127                unsigned p : 1;
    126128#endif
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