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Changeset d1cf4dc in mainline


Ignore:
Timestamp:
2013-01-28T22:40:17Z (9 years ago)
Author:
Maurizio Lombardi <m.lombardi85@…>
Branches:
lfn, master
Children:
11346011
Parents:
f6c6814
Message:

am335x: Fix UART initialization

File:
1 edited

Legend:

Unmodified
Added
Removed
  • kernel/genarch/src/drivers/am335x/uart.c

    rf6c6814 rd1cf4dc  
    9090        /* Soft reset the port */
    9191        uart->regs->sysc = AM335x_UART_SYSC_SOFTRESET_FLAG;
    92         while (!(uart->regs->syss & AM335x_UART_SYSS_RESETDONE_FLAG)) ;
     92        while (!(uart->regs->syss & AM335x_UART_SYSS_RESETDONE_FLAG));
     93
     94        /* Disable the UART module */
     95        uart->regs->mdr1 |= AM335x_UART_MDR_MS_DISABLE;
    9396
    9497        /* Enable access to EFR register */
    95         const uint8_t lcr = uart->regs->lcr; /* Save old value */
    9698        uart->regs->lcr = 0xbf;              /* Sets config mode B */
    9799
     
    111113        /* Enable fine granularity for RX FIFO and set trigger level to 1,
    112114         * TX FIFO, trigger level is irrelevant*/
    113         uart->regs->lcr = 0xbf;              /* Sets config mode B */
     115        uart->regs->lcr = 0xBF;              /* Sets config mode B */
    114116        uart->regs->scr = AM335x_UART_SCR_RX_TRIG_GRANU1_FLAG;
    115117        uart->regs->tlr = 1 << AM335x_UART_TLR_RX_FIFO_TRIG_SHIFT;
     118
     119        /* Sets config mode A */
     120        uart->regs->lcr = 0x80;
     121        /* Restore tcl_tlr access flag */
     122        if (!tcl_tlr)
     123                uart->regs->mcr &= ~AM335x_UART_MCR_TCR_TLR_FLAG;
     124        /* Sets config mode B */
     125        uart->regs->lcr = 0xBF;
     126
     127        /* Set the divisor value to get a baud rate of 115200 bps */
     128        uart->regs->dll = 0x1A;
     129        uart->regs->dlh = 0x00;
    116130
    117131        /* Restore enhanced */
     
    119133                uart->regs->efr &= ~AM335x_UART_EFR_ENH_FLAG;
    120134
    121         uart->regs->lcr = 0x80;              /* Config mode A */
    122         /* Restore tcl_lcr access flag*/
    123         if (!tcl_tlr)
    124                 uart->regs->mcr &= ~AM335x_UART_MCR_TCR_TLR_FLAG;
     135        /* Set the DIV_EN bit to 0 */
     136        uart->regs->lcr &= ~AM335x_UART_LCR_DIV_EN_FLAG;
     137        /* Set the BREAK_EN bit to 0 */
     138        uart->regs->lcr &= ~AM335x_UART_LCR_BREAK_EN_FLAG;
     139        /* No parity */
     140        uart->regs->lcr &= ~AM335x_UART_LCR_PARITY_EN_FLAG;
     141        /* Stop = 1 bit */
     142        uart->regs->lcr &= ~AM335x_UART_LCR_NB_STOP_FLAG;
     143        /* Char length = 8 bits */
     144        uart->regs->lcr |= AM335x_UART_LCR_CHAR_LENGTH_8BITS;
    125145
    126         /* Restore lcr */
    127         uart->regs->lcr = lcr;
     146        /* Enable the UART module */
     147        uart->regs->mdr1 &= AM335x_UART_MDR_MS_UART16;
    128148
    129149        /* Disable interrupts */
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