Changeset caed0279 in mainline for kernel/arch/amd64/include/mm/page.h

Timestamp:

2012-05-05T13:24:58Z (12 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

1295a1da

Parents:

ee04c28

Message:

Fix computation of the address increment between two PTL0 entries.

The previous computation divided the theoretical address space size
(either 2^{32 or 2}64 bytes) by the number of PTL0 entries. This,
however, provides wrong results on some 64-bit architectures that use
smaller virtual address spaces. For example, amd64 has only 48-bit
virtual address space and so the computation needs to take this into
account.

(No files)