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Changeset ca652eb in mainline


Ignore:
Timestamp:
2014-07-05T19:27:22Z (7 years ago)
Author:
Agnieszka Tabaka <nufcia@…>
Branches:
master
Children:
b8e75319
Parents:
727e639
Message:

Fixes allowing to compile driver cleanly on IA32 platform.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/nic/rtl8169/driver.c

    r727e639 rca652eb  
    247247                return rc;
    248248
    249         ddf_msg(LVL_DEBUG, "TX ring address: phys=0x%08lx, virt=%p",
     249        ddf_msg(LVL_DEBUG, "TX ring address: phys=0x%#" PRIxn ", virt=%p",
    250250            rtl8169->tx_ring_phys, rtl8169->tx_ring);
    251251
     
    261261                return rc;
    262262
    263         ddf_msg(LVL_DEBUG, "RX ring address: phys=0x%08lx, virt=%p",
     263        ddf_msg(LVL_DEBUG, "RX ring address: phys=0x%#" PRIxn ", virt=%p",
    264264            rtl8169->rx_ring_phys, rtl8169->rx_ring);
    265265
     
    275275                return rc;
    276276
    277         ddf_msg(LVL_DEBUG, "TX buffers base address: phys=0x%08lx, virt=%p",
     277        ddf_msg(LVL_DEBUG, "TX buffers base address: phys=0x%#" PRIxn " virt=%p",
    278278            rtl8169->tx_buff_phys, rtl8169->tx_buff);
    279279
     
    287287                return rc;
    288288
    289         ddf_msg(LVL_DEBUG, "RX buffers base address: phys=0x%08lx, virt=%p",
     289        ddf_msg(LVL_DEBUG, "RX buffers base address: phys=0x%#" PRIxn ", virt=%p",
    290290            rtl8169->rx_buff_phys, rtl8169->rx_buff);
    291291
     
    615615{
    616616        rtl8169_descr_t *descr;
    617         uintptr_t buff_phys;
     617        uint64_t buff_phys;
    618618        unsigned int i = first;
    619619
     
    638638{
    639639        int rc;
     640        uint64_t tmp;
    640641
    641642        ddf_msg(LVL_NOTE, "Activating device");
     
    658659
    659660        /* Write address of descriptor as start of TX ring */
    660         pio_write_32(rtl8169->regs + TNPDS, rtl8169->tx_ring_phys & 0xffffffff);
    661         pio_write_32(rtl8169->regs + TNPDS + 4, (rtl8169->tx_ring_phys >> 32) & 0xffffffff);
     661        tmp = rtl8169->tx_ring_phys;
     662        pio_write_32(rtl8169->regs + TNPDS, tmp & 0xffffffff);
     663        pio_write_32(rtl8169->regs + TNPDS + 4, (tmp >> 32) & 0xffffffff);
    662664        rtl8169->tx_head = 0;
    663665        rtl8169->tx_tail = 0;
     
    665667
    666668        /* Write RX ring address */
    667         pio_write_32(rtl8169->regs + RDSAR, rtl8169->rx_ring_phys & 0xffffffff);
    668         pio_write_32(rtl8169->regs + RDSAR + 4, (rtl8169->rx_ring_phys >> 32) & 0xffffffff);
     669        tmp = rtl8169->rx_ring_phys;
     670        pio_write_32(rtl8169->regs + RDSAR, tmp & 0xffffffff);
     671        pio_write_32(rtl8169->regs + RDSAR + 4, (tmp >> 32) & 0xffffffff);
    669672        rtl8169->rx_head = 0;
    670673        rtl8169->rx_tail = 0;
     
    895898        unsigned int head, tail;
    896899        void *buff;
    897         uintptr_t buff_phys;
     900        uint64_t buff_phys;
    898901        rtl8169_t *rtl8169 = nic_get_specific(nic_data);
    899902
     
    906909        fibril_mutex_lock(&rtl8169->tx_lock);
    907910
    908         ddf_msg(LVL_NOTE, "send_frame: size: %ld, tx_head=%d tx_tail=%d",
     911        ddf_msg(LVL_NOTE, "send_frame: size: %zu, tx_head=%d tx_tail=%d",
    909912            size, rtl8169->tx_head, rtl8169->tx_tail);
    910913
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