Changeset c48de91 in mainline

Timestamp:

2019-06-09T11:51:56Z (5 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

0716a1f

Parents:

2a103b5

Message:

Hide macros used internally by the i8259 driver

Location:

kernel/genarch

Files:

• include/genarch/drivers/i8259/i8259.h (modified) (1 diff)
• src/drivers/i8259/i8259.c (modified) (8 diffs)

kernel/genarch/include/genarch/drivers/i8259/i8259.h

@@ -41 +41 @@
 #include <stdbool.h>
 
-/* ICW1 bits */
-#define PIC_ICW1           (1 << 4)
-#define PIC_ICW1_NEEDICW4  (1 << 0)
-
-/* OCW3 bits */
-#define PIC_OCW3           (1 << 3)
-#define PIC_OCW3_READ_ISR  (3 << 0)
-
-/* OCW4 bits */
-#define PIC_OCW4           (0 << 3)
-#define PIC_OCW4_NSEOI     (1 << 5)
-
-#define PIC0_IRQ_COUNT      8
-#define PIC1_IRQ_COUNT      8
-
-#define PIC0_IRQ_PIC1       2
-
 typedef struct {
         ioport8_t port1;

kernel/genarch/src/drivers/i8259/i8259.c

@@ -32 +32 @@
 /**
  * @file
- * @brief PIC driver.
+ * @brief i8259 driver.
  *
  * Programmable Interrupt Controller for UP systems based on i8259 chip.
@@ -42 +42 @@
 #include <log.h>
 #include <interrupt.h>
+
+/* ICW1 bits */
+#define I8259_ICW1           (1 << 4)
+#define I8259_ICW1_NEEDICW4  (1 << 0)
+
+/* OCW3 bits */
+#define I8259_OCW3           (1 << 3)
+#define I8259_OCW3_READ_ISR  (3 << 0)
+
+/* OCW4 bits */
+#define I8259_OCW4           (0 << 3)
+#define I8259_OCW4_NSEOI     (1 << 5)
+
+#define I8259_IRQ_COUNT 8
+
+#define I8259_IRQ_SLAVE 2
 
 static const char *i8259_get_name(void);
@@ -64 +80 @@
 
         /* ICW1: this is ICW1, ICW4 to follow */
-        pio_write_8(&pic0->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
+        pio_write_8(&pic0->port1, I8259_ICW1 | I8259_ICW1_NEEDICW4);
 
         /* ICW2: IRQ 0 maps to interrupt vector address irq0_vec */
         pio_write_8(&pic0->port2, irq0_vec);
 
-        /* ICW3: pic1 using IRQ PIC0_IRQ_PIC1 */
-        pio_write_8(&pic0->port2, 1 << PIC0_IRQ_PIC1);
+        /* ICW3: pic1 using IRQ I8259_IRQ_SLAVE */
+        pio_write_8(&pic0->port2, 1 << I8259_IRQ_SLAVE);
 
         /* ICW4: i8086 mode */
@@ -76 +92 @@
 
         /* ICW1: ICW1, ICW4 to follow */
-        pio_write_8(&pic1->port1, PIC_ICW1 | PIC_ICW1_NEEDICW4);
+        pio_write_8(&pic1->port1, I8259_ICW1 | I8259_ICW1_NEEDICW4);
 
         /* ICW2: IRQ 8 maps to interrupt vector address irq0_vec + 8 */
-        pio_write_8(&pic1->port2, irq0_vec + PIC0_IRQ_COUNT);
+        pio_write_8(&pic1->port2, irq0_vec + I8259_IRQ_COUNT);
 
-        /* ICW3: pic1 is known as PIC0_IRQ_PIC1 */
-        pio_write_8(&pic1->port2, PIC0_IRQ_PIC1);
+        /* ICW3: pic1 is known as I8259_IRQ_SLAVE */
+        pio_write_8(&pic1->port2, I8259_IRQ_SLAVE);
 
         /* ICW4: i8086 mode */
         pio_write_8(&pic1->port2, 1);
 
-        i8259_disable_irqs(0xffff);             /* disable all irq's */
-        i8259_enable_irqs(1 << PIC0_IRQ_PIC1);  /* but enable PIC0_IRQ_PIC1 */
+        /* disable all irq's */
+        i8259_disable_irqs(0xffff);
+        /* but enable I8259_IRQ_SLAVE */
+        i8259_enable_irqs(1 << I8259_IRQ_SLAVE);
 }
 
@@ -105 +123 @@
                     (uint8_t) (x & (~(irqmask & 0xff))));
         }
-        if (irqmask >> PIC0_IRQ_COUNT) {
+        if (irqmask >> I8259_IRQ_COUNT) {
                 x = pio_read_8(&saved_pic1->port2);
                 pio_write_8(&saved_pic1->port2,
-                    (uint8_t) (x & (~(irqmask >> PIC0_IRQ_COUNT))));
+                    (uint8_t) (x & (~(irqmask >> I8259_IRQ_COUNT))));
         }
 }
@@ -121 +139 @@
                     (uint8_t) (x | (irqmask & 0xff)));
         }
-        if (irqmask >> PIC0_IRQ_COUNT) {
+        if (irqmask >> I8259_IRQ_COUNT) {
                 x = pio_read_8(&saved_pic1->port2);
                 pio_write_8(&saved_pic1->port2,
-                    (uint8_t) (x | (irqmask >> PIC0_IRQ_COUNT)));
+                    (uint8_t) (x | (irqmask >> I8259_IRQ_COUNT)));
         }
 }
@@ -130 +148 @@
 void i8259_eoi(unsigned int irq)
 {
-        if (irq >= PIC0_IRQ_COUNT)
-                pio_write_8(&saved_pic1->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
-        pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
+        if (irq >= I8259_IRQ_COUNT)
+                pio_write_8(&saved_pic1->port1, I8259_OCW4 | I8259_OCW4_NSEOI);
+        pio_write_8(&saved_pic0->port1, I8259_OCW4 | I8259_OCW4_NSEOI);
 }
 
 bool i8259_is_spurious(unsigned int irq)
 {
-        pio_write_8(&saved_pic0->port1, PIC_OCW3 | PIC_OCW3_READ_ISR);
-        pio_write_8(&saved_pic1->port1, PIC_OCW3 | PIC_OCW3_READ_ISR);
+        pio_write_8(&saved_pic0->port1, I8259_OCW3 | I8259_OCW3_READ_ISR);
+        pio_write_8(&saved_pic1->port1, I8259_OCW3 | I8259_OCW3_READ_ISR);
         uint8_t isr_lo = pio_read_8(&saved_pic0->port1);
         uint8_t isr_hi = pio_read_8(&saved_pic1->port1);
-        return !(((isr_hi << PIC0_IRQ_COUNT) | isr_lo) & (1 << irq));
+        return !(((isr_hi << I8259_IRQ_COUNT) | isr_lo) & (1 << irq));
 }
 
@@ -147 +165 @@
 {
         /* For spurious IRQs from pic1, we need to isssue an EOI to pic0 */
-        if (irq >= PIC0_IRQ_COUNT)
-                pio_write_8(&saved_pic0->port1, PIC_OCW4 | PIC_OCW4_NSEOI);
+        if (irq >= I8259_IRQ_COUNT)
+                pio_write_8(&saved_pic0->port1, I8259_OCW4 | I8259_OCW4_NSEOI);
 }