Ignore:
Timestamp:
2010-02-20T20:54:53Z (14 years ago)
Author:
Pavel Rimsky <pavel@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
721d4e85, 95c4776
Parents:
f516bc2 (diff), b03a666 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Synchronize with head.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/lib/libc/arch/amd64/include/atomic.h

    rf516bc2 rc2efbb4  
    4242#include <atomicdflt.h>
    4343
    44 static inline void atomic_inc(atomic_t *val) {
    45         asm volatile ("lock incq %0\n" : "+m" (val->count));
     44static inline void atomic_inc(atomic_t *val)
     45{
     46        asm volatile (
     47                "lock incq %[count]\n"
     48                : [count] "+m" (val->count)
     49        );
    4650}
    4751
    48 static inline void atomic_dec(atomic_t *val) {
    49         asm volatile ("lock decq %0\n" : "+m" (val->count));
     52static inline void atomic_dec(atomic_t *val)
     53{
     54        asm volatile (
     55                "lock decq %[count]\n"
     56                : [count] "+m" (val->count)
     57        );
    5058}
    5159
    52 static inline long atomic_postinc(atomic_t *val)
     60static inline atomic_count_t atomic_postinc(atomic_t *val)
    5361{
    54         long r;
    55 
    56         asm volatile (
    57                 "movq $1, %0\n"
    58                 "lock xaddq %0, %1\n"
    59                 : "=r" (r), "+m" (val->count)
    60         );
    61 
    62         return r;
    63 }
    64 
    65 static inline long atomic_postdec(atomic_t *val)
    66 {
    67         long r;
     62        atomic_count_t r = 1;
    6863       
    6964        asm volatile (
    70                 "movq $-1, %0\n"
    71                 "lock xaddq %0, %1\n"
    72                 : "=r" (r), "+m" (val->count)
     65                "lock xaddq %[r], %[count]\n"
     66                : [count] "+m" (val->count),
     67                  [r] "+r" (r)
    7368        );
    7469       
     
    7671}
    7772
    78 #define atomic_preinc(val) (atomic_postinc(val) + 1)
    79 #define atomic_predec(val) (atomic_postdec(val) - 1)
     73static inline atomic_count_t atomic_postdec(atomic_t *val)
     74{
     75        atomic_count_t r = -1;
     76       
     77        asm volatile (
     78                "lock xaddq %[r], %[count]\n"
     79                : [count] "+m" (val->count),
     80                  [r] "+r" (r)
     81        );
     82       
     83        return r;
     84}
     85
     86#define atomic_preinc(val)  (atomic_postinc(val) + 1)
     87#define atomic_predec(val)  (atomic_postdec(val) - 1)
    8088
    8189#endif
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