Changeset c0e9f3f in mainline for kernel/arch/amd64/include/interrupt.h

Timestamp:

2010-07-13T21:48:00Z (14 years ago)

Author:

Jakub Jermar <jakub@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

6b1a85c, 9171f12

Parents:

a7199c2

Message:

Change the amd64 istate_t and interrupt handler macro so that the istate
structure now captures all GPRs and provides seamless stack frame linkage.

File:

• kernel/arch/amd64/include/interrupt.h (modified) (1 diff)

kernel/arch/amd64/include/interrupt.h

@@ -74 +74 @@
 typedef struct istate {
         uint64_t rax;
+        uint64_t rbx;
         uint64_t rcx;
         uint64_t rdx;
         uint64_t rsi;
         uint64_t rdi;
+        uint64_t rbp;
         uint64_t r8;
         uint64_t r9;
         uint64_t r10;
         uint64_t r11;
-        uint64_t rbp;
-        uint64_t error_word;
+        uint64_t r12;
+        uint64_t r13;
+        uint64_t r14;
+        uint64_t r15;
+        uint64_t alignment;     /* align rbp_frame on multiple of 16 */
+        uint64_t rbp_frame;     /* imitation of frame pointer linkage */
+        uint64_t rip_frame;     /* imitation of return address linkage */
+        uint64_t error_word;    /* real or fake error word */
         uint64_t rip;
         uint64_t cs;
         uint64_t rflags;
-        uint64_t stack[];  /* Additional data on stack */
+        uint64_t rsp;           /* only if istate_t is from uspace */
+        uint64_t ss;            /* only if istate_t is from uspace */
 } istate_t;