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Changeset c058a388 in mainline


Ignore:
Timestamp:
2017-07-16T17:19:37Z (3 years ago)
Author:
Jaroslav Jindrak <dzejrou@…>
Branches:
master
Children:
fe5db713
Parents:
7bd99bf
Message:

Added reset device command sender, assertions to sender and TODOs laying out commands that need sender implementation.

Location:
uspace/drv/bus/usb/xhci
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/usb/xhci/commands.c

    r7bd99bf rc058a388  
    4646static inline int ring_doorbell(xhci_hc_t *hc, unsigned doorbell, unsigned target)
    4747{
     48        assert(hc);
    4849        uint32_t v = host2xhci(32, target & BIT_RRANGE(uint32_t, 7));
    4950        pio_write_32(&hc->db_arry[doorbell], v);
     
    5455                              unsigned doorbell, unsigned target)
    5556{
     57        assert(hc);
     58        assert(trb);
     59
    5660        xhci_trb_ring_enqueue(&hc->command_ring, trb);
    5761        ring_doorbell(hc, doorbell, target);
     
    116120int xhci_send_no_op_command(xhci_hc_t *hc)
    117121{
     122        assert(hc);
     123
    118124        xhci_trb_t trb;
    119125        memset(&trb, 0, sizeof(trb));
     
    126132int xhci_send_enable_slot_command(xhci_hc_t *hc)
    127133{
     134        assert(hc);
     135
    128136        xhci_trb_t trb;
    129137        memset(&trb, 0, sizeof(trb));
     
    138146int xhci_send_disable_slot_command(xhci_hc_t *hc, uint32_t slot_id)
    139147{
     148        assert(hc);
     149
    140150        xhci_trb_t trb;
    141151        memset(&trb, 0, sizeof(trb));
     
    151161                                     xhci_input_ctx_t *ictx)
    152162{
     163        assert(hc);
     164        assert(ictx);
     165
    153166        /**
    154167         * TODO: Requirements for this command:
     
    161174
    162175        uint64_t phys_addr = (uint64_t) addr_to_phys(ictx);
    163         trb.parameter = host2xhci(32, phys_addr & 0xFFFFFFFFFFFFFFF0);
     176        trb.parameter = host2xhci(32, phys_addr & (~0xF));
    164177
    165178        /**
     
    180193                                         xhci_input_ctx_t *ictx)
    181194{
     195        assert(hc);
     196        assert(ictx);
     197
    182198        xhci_trb_t trb;
    183199        memset(&trb, 0, sizeof(trb));
    184200
    185201        uint64_t phys_addr = (uint64_t) addr_to_phys(ictx);
    186         trb.parameter = host2xhci(32, phys_addr & 0xFFFFFFFFFFFFFFF0);
     202        trb.parameter = host2xhci(32, phys_addr & (~0xF));
    187203
    188204        trb.control = host2xhci(32, XHCI_TRB_TYPE_CONFIGURE_ENDPOINT_CMD << 10);
     
    196212                                       xhci_input_ctx_t *ictx)
    197213{
     214        assert(hc);
     215        assert(ictx);
     216
    198217        /**
    199218         * Note: All Drop Context flags of the input context shall be 0,
     
    206225
    207226        uint64_t phys_addr = (uint64_t) addr_to_phys(ictx);
    208         trb.parameter = host2xhci(32, phys_addr & 0xFFFFFFFFFFFFFFF0);
     227        trb.parameter = host2xhci(32, phys_addr & (~0xF));
    209228
    210229        trb.control = host2xhci(32, XHCI_TRB_TYPE_EVALUATE_CONTEXT_CMD << 10);
     
    217236int xhci_send_reset_endpoint_command(xhci_hc_t *hc, uint32_t slot_id, uint32_t ep_id, uint8_t tcs)
    218237{
     238        assert(hc);
     239
    219240        /**
    220241         * Note: TCS can have values 0 or 1. If it is set to 0, see sectuon 4.5.8 for
     
    235256int xhci_send_stop_endpoint_command(xhci_hc_t *hc, uint32_t slot_id, uint32_t ep_id, uint8_t susp)
    236257{
     258        assert(hc);
     259
    237260        xhci_trb_t trb;
    238261        memset(&trb, 0, sizeof(trb));
     
    245268
    246269        return enqueue_trb(hc, &trb, 0, 0);
    247 
     270}
     271
     272int xhci_send_reset_device_command(xhci_hc_t *hc, uint32_t slot_id)
     273{
     274        assert(hc);
     275
     276        xhci_trb_t trb;
     277        memset(&trb, 0, sizeof(trb));
     278
     279        trb.control = host2xhci(32, XHCI_TRB_TYPE_RESET_DEVICE_CMD << 10);
     280        trb.control |= host2xhci(32, hc->command_ring.pcs);
     281        trb.control |= host2xhci(32, slot_id << 24);
     282
     283        return enqueue_trb(hc, &trb, 0, 0);
    248284}
    249285
    250286int xhci_handle_command_completion(xhci_hc_t *hc, xhci_trb_t *trb)
    251287{
     288        assert(hc);
     289        assert(trb);
     290
    252291        usb_log_debug("HC(%p) Command completed.", hc);
    253292        xhci_dump_trb(trb);
     
    290329                //       handle it appropriately!
    291330                return EOK;
     331        case XHCI_TRB_TYPE_RESET_DEVICE_CMD:
     332                return EOK;
    292333        default:
    293334                usb_log_debug2("Unsupported command trb.");
  • uspace/drv/bus/usb/xhci/commands.h

    r7bd99bf rc058a388  
    4949int xhci_send_reset_endpoint_command(xhci_hc_t *, uint32_t, uint32_t, uint8_t);
    5050int xhci_send_stop_endpoint_command(xhci_hc_t *, uint32_t, uint32_t, uint8_t);
     51// TODO: Set dequeue ptr (section 4.6.10).
     52int xhci_send_reset_device_command(xhci_hc_t *, uint32_t);
     53// TODO: Force event (optional normative, for VMM, section 4.6.12).
     54// TODO: Negotiate bandwidth (optional normative, section 4.6.13).
     55// TODO: Set latency tolerance value (optional normative, section 4.6.14).
     56// TODO: Get port bandwidth (mandatory, but needs root hub implementation, section 4.6.15).
     57// TODO: Force header (mandatory, but needs root hub implementation, section 4.6.16).
    5158
    5259int xhci_handle_command_completion(xhci_hc_t *, xhci_trb_t *);
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