Changeset bd48f4c in mainline for kernel/arch/ia64/include/asm.h


Ignore:
Timestamp:
2010-07-12T10:53:30Z (14 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
bd11d3e
Parents:
c40e6ef (diff), bee2d4c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia64/include/asm.h

    rc40e6ef rbd48f4c  
    4040#include <typedefs.h>
    4141#include <arch/register.h>
     42#include <trace.h>
    4243
    4344#define IA64_IOSPACE_ADDRESS  0xE001000000000000ULL
    4445
    45 static inline void pio_write_8(ioport8_t *port, uint8_t v)
     46NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t v)
    4647{
    4748        uintptr_t prt = (uintptr_t) port;
    … …  
    5657}
    5758
    58 static inline void pio_write_16(ioport16_t *port, uint16_t v)
     59NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t v)
    5960{
    6061        uintptr_t prt = (uintptr_t) port;
    … …  
    6970}
    7071
    71 static inline void pio_write_32(ioport32_t *port, uint32_t v)
     72NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t v)
    7273{
    7374        uintptr_t prt = (uintptr_t) port;
    … …  
    8283}
    8384
    84 static inline uint8_t pio_read_8(ioport8_t *port)
     85NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
    8586{
    8687        uintptr_t prt = (uintptr_t) port;
    … …  
    9596}
    9697
    97 static inline uint16_t pio_read_16(ioport16_t *port)
     98NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
    9899{
    99100        uintptr_t prt = (uintptr_t) port;
    … …  
    108109}
    109110
    110 static inline uint32_t pio_read_32(ioport32_t *port)
     111NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
    111112{
    112113        uintptr_t prt = (uintptr_t) port;
    … …  
    126127 * The stack is assumed to be STACK_SIZE long.
    127128 * The stack must start on page boundary.
    128  */
    129 static inline uintptr_t get_stack_base(void)
    130 {
    131         uint64_t v;
    132        
    133         /* I'm not sure why but this code bad inlines in scheduler,
    134            so THE shifts about 16B and causes kernel panic
    135            
    136            asm volatile (
    137                "and %[value] = %[mask], r12"
    138                : [value] "=r" (v)
    139                : [mask] "r" (~(STACK_SIZE - 1))
    140            );
    141            return v;
    142            
    143            This code have the same meaning but inlines well.
    144         */
     129 *
     130 */
     131NO_TRACE static inline uintptr_t get_stack_base(void)
     132{
     133        uint64_t v;
     134       
     135        /*
     136         * I'm not sure why but this code inlines badly
     137         * in scheduler, resulting in THE shifting about
     138         * 16B and causing kernel panic.
     139         *
     140         * asm volatile (
     141         *     "and %[value] = %[mask], r12"
     142         *     : [value] "=r" (v)
     143         *     : [mask] "r" (~(STACK_SIZE - 1))
     144         * );
     145         * return v;
     146         *
     147         * The following code has the same semantics but
     148         * inlines correctly.
     149         *
     150         */
    145151       
    146152        asm volatile (
    … …  
    155161 *
    156162 * @return PSR.
    157  */
    158 static inline uint64_t psr_read(void)
     163 *
     164 */
     165NO_TRACE static inline uint64_t psr_read(void)
    159166{
    160167        uint64_t v;
    … …  
    171178 *
    172179 * @return Return location of interruption vector table.
    173  */
    174 static inline uint64_t iva_read(void)
     180 *
     181 */
     182NO_TRACE static inline uint64_t iva_read(void)
    175183{
    176184        uint64_t v;
    … …  
    187195 *
    188196 * @param v New location of interruption vector table.
    189  */
    190 static inline void iva_write(uint64_t v)
     197 *
     198 */
     199NO_TRACE static inline void iva_write(uint64_t v)
    191200{
    192201        asm volatile (
    … …  
    196205}
    197206
    198 
    199207/** Read IVR (External Interrupt Vector Register).
    200208 *
    201  * @return Highest priority, pending, unmasked external interrupt vector.
    202  */
    203 static inline uint64_t ivr_read(void)
     209 * @return Highest priority, pending, unmasked external
     210 *         interrupt vector.
     211 *
     212 */
     213NO_TRACE static inline uint64_t ivr_read(void)
    204214{
    205215        uint64_t v;
    … …  
    213223}
    214224
    215 static inline uint64_t cr64_read(void)
     225NO_TRACE static inline uint64_t cr64_read(void)
    216226{
    217227        uint64_t v;
    … …  
    225235}
    226236
    227 
    228237/** Write ITC (Interval Timer Counter) register.
    229238 *
    230239 * @param v New counter value.
    231  */
    232 static inline void itc_write(uint64_t v)
     240 *
     241 */
     242NO_TRACE static inline void itc_write(uint64_t v)
    233243{
    234244        asm volatile (
    … …  
    241251 *
    242252 * @return Current counter value.
    243  */
    244 static inline uint64_t itc_read(void)
     253 *
     254 */
     255NO_TRACE static inline uint64_t itc_read(void)
    245256{
    246257        uint64_t v;
    … …  
    257268 *
    258269 * @param v New match value.
    259  */
    260 static inline void itm_write(uint64_t v)
     270 *
     271 */
     272NO_TRACE static inline void itm_write(uint64_t v)
    261273{
    262274        asm volatile (
    … …  
    269281 *
    270282 * @return Match value.
    271  */
    272 static inline uint64_t itm_read(void)
     283 *
     284 */
     285NO_TRACE static inline uint64_t itm_read(void)
    273286{
    274287        uint64_t v;
    … …  
    285298 *
    286299 * @return Current vector and mask bit.
    287  */
    288 static inline uint64_t itv_read(void)
     300 *
     301 */
     302NO_TRACE static inline uint64_t itv_read(void)
    289303{
    290304        uint64_t v;
    … …  
    301315 *
    302316 * @param v New vector and mask bit.
    303  */
    304 static inline void itv_write(uint64_t v)
     317 *
     318 */
     319NO_TRACE static inline void itv_write(uint64_t v)
    305320{
    306321        asm volatile (
    … …  
    313328 *
    314329 * @param v This value is ignored.
    315  */
    316 static inline void eoi_write(uint64_t v)
     330 *
     331 */
     332NO_TRACE static inline void eoi_write(uint64_t v)
    317333{
    318334        asm volatile (
    … …  
    325341 *
    326342 * @return Current value of TPR.
    327  */
    328 static inline uint64_t tpr_read(void)
     343 *
     344 */
     345NO_TRACE static inline uint64_t tpr_read(void)
    329346{
    330347        uint64_t v;
    … …  
    341358 *
    342359 * @param v New value of TPR.
    343  */
    344 static inline void tpr_write(uint64_t v)
     360 *
     361 */
     362NO_TRACE static inline void tpr_write(uint64_t v)
    345363{
    346364        asm volatile (
    … …  
    356374 *
    357375 * @return Old interrupt priority level.
    358  */
    359 static ipl_t interrupts_disable(void)
     376 *
     377 */
     378NO_TRACE static ipl_t interrupts_disable(void)
    360379{
    361380        uint64_t v;
    … …  
    377396 *
    378397 * @return Old interrupt priority level.
    379  */
    380 static ipl_t interrupts_enable(void)
     398 *
     399 */
     400NO_TRACE static ipl_t interrupts_enable(void)
    381401{
    382402        uint64_t v;
    … …  
    399419 *
    400420 * @param ipl Saved interrupt priority level.
    401  */
    402 static inline void interrupts_restore(ipl_t ipl)
     421 *
     422 */
     423NO_TRACE static inline void interrupts_restore(ipl_t ipl)
    403424{
    404425        if (ipl & PSR_I_MASK)
    … …  
    411432 *
    412433 * @return PSR.
    413  */
    414 static inline ipl_t interrupts_read(void)
     434 *
     435 */
     436NO_TRACE static inline ipl_t interrupts_read(void)
    415437{
    416438        return (ipl_t) psr_read();
    … …  
    422444 *
    423445 */
    424 static inline bool interrupts_disabled(void)
     446NO_TRACE static inline bool interrupts_disabled(void)
    425447{
    426448        return !(psr_read() & PSR_I_MASK);
    … …  
    428450
    429451/** Disable protection key checking. */
    430 static inline void pk_disable(void)
     452NO_TRACE static inline void pk_disable(void)
    431453{
    432454        asm volatile (
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