Changeset bd48f4c in mainline for kernel/arch/ia32/include/asm.h


Ignore:
Timestamp:
2010-07-12T10:53:30Z (14 years ago)
Author:
Jiri Svoboda <jiri@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
bd11d3e
Parents:
c40e6ef (diff), bee2d4c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge mainline changes.

File:
1 edited

Legend:

Unmodified
Added
Removed

  • kernel/arch/ia32/include/asm.h

    rc40e6ef rbd48f4c  
    4141#include <typedefs.h>
    4242#include <config.h>
     43#include <trace.h>
    4344
    4445extern uint32_t interrupt_handler_size;
    4546
    46 extern void paging_on(void);
    47 
    48 extern void interrupt_handlers(void);
    49 
    50 extern void enable_l_apic_in_msr(void);
    51 
    52 
    53 extern void asm_delay_loop(uint32_t t);
    54 extern void asm_fake_loop(uint32_t t);
    55 
    56 
    5747/** Halt CPU
    5848 *
    … …  
    6050 *
    6151 */
    62 static inline __attribute__((noreturn)) void cpu_halt(void)
     52NO_TRACE static inline __attribute__((noreturn)) void cpu_halt(void)
    6353{
    6454        while (true) {
    … …  
    6959}
    7060
    71 static inline void cpu_sleep(void)
    72 {
    73         asm volatile ("hlt\n");
    74 }
    75 
    76 #define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \
     61NO_TRACE static inline void cpu_sleep(void)
     62{
     63        asm volatile (
     64                "hlt\n"
     65        );
     66}
     67
     68#define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \
    7769        { \
    7870                unative_t res; \
    … …  
    8476        }
    8577
    86 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \
     78#define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (unative_t regn) \
    8779        { \
    8880                asm volatile ( \
    … …  
    119111 *
    120112 */
    121 static inline void pio_write_8(ioport8_t *port, uint8_t val)
     113NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val)
    122114{
    123115        asm volatile (
    124116                "outb %b[val], %w[port]\n"
    125                 :: [val] "a" (val), [port] "d" (port)
     117                :: [val] "a" (val),
     118                   [port] "d" (port)
    126119        );
    127120}
    … …  
    135128 *
    136129 */
    137 static inline void pio_write_16(ioport16_t *port, uint16_t val)
     130NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val)
    138131{
    139132        asm volatile (
    140133                "outw %w[val], %w[port]\n"
    141                 :: [val] "a" (val), [port] "d" (port)
     134                :: [val] "a" (val),
     135                   [port] "d" (port)
    142136        );
    143137}
    … …  
    151145 *
    152146 */
    153 static inline void pio_write_32(ioport32_t *port, uint32_t val)
     147NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val)
    154148{
    155149        asm volatile (
    156150                "outl %[val], %w[port]\n"
    157                 :: [val] "a" (val), [port] "d" (port)
     151                :: [val] "a" (val),
     152                   [port] "d" (port)
    158153        );
    159154}
    … …  
    167162 *
    168163 */
    169 static inline uint8_t pio_read_8(ioport8_t *port)
     164NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port)
    170165{
    171166        uint8_t val;
    … …  
    188183 *
    189184 */
    190 static inline uint16_t pio_read_16(ioport16_t *port)
     185NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port)
    191186{
    192187        uint16_t val;
    … …  
    209204 *
    210205 */
    211 static inline uint32_t pio_read_32(ioport32_t *port)
     206NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port)
    212207{
    213208        uint32_t val;
    … …  
    230225 *
    231226 */
    232 static inline ipl_t interrupts_enable(void)
     227NO_TRACE static inline ipl_t interrupts_enable(void)
    233228{
    234229        ipl_t v;
    … …  
    252247 *
    253248 */
    254 static inline ipl_t interrupts_disable(void)
     249NO_TRACE static inline ipl_t interrupts_disable(void)
    255250{
    256251        ipl_t v;
    … …  
    273268 *
    274269 */
    275 static inline void interrupts_restore(ipl_t ipl)
     270NO_TRACE static inline void interrupts_restore(ipl_t ipl)
    276271{
    277272        asm volatile (
    … …  
    287282 *
    288283 */
    289 static inline ipl_t interrupts_read(void)
     284NO_TRACE static inline ipl_t interrupts_read(void)
    290285{
    291286        ipl_t v;
    … …  
    305300 *
    306301 */
    307 static inline bool interrupts_disabled(void)
     302NO_TRACE static inline bool interrupts_disabled(void)
    308303{
    309304        ipl_t v;
    … …  
    319314
    320315/** Write to MSR */
    321 static inline void write_msr(uint32_t msr, uint64_t value)
     316NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value)
    322317{
    323318        asm volatile (
    324319                "wrmsr"
    325                 :: "c" (msr), "a" ((uint32_t) (value)),
     320                :: "c" (msr),
     321                   "a" ((uint32_t) (value)),
    326322                   "d" ((uint32_t) (value >> 32))
    327323        );
    328324}
    329325
    330 static inline uint64_t read_msr(uint32_t msr)
     326NO_TRACE static inline uint64_t read_msr(uint32_t msr)
    331327{
    332328        uint32_t ax, dx;
    … …  
    334330        asm volatile (
    335331                "rdmsr"
    336                 : "=a" (ax), "=d" (dx)
     332                : "=a" (ax),
     333                  "=d" (dx)
    337334                : "c" (msr)
    338335        );
    … …  
    349346 *
    350347 */
    351 static inline uintptr_t get_stack_base(void)
     348NO_TRACE static inline uintptr_t get_stack_base(void)
    352349{
    353350        uintptr_t v;
    … …  
    367364 *
    368365 */
    369 static inline void invlpg(uintptr_t addr)
     366NO_TRACE static inline void invlpg(uintptr_t addr)
    370367{
    371368        asm volatile (
    … …  
    380377 *
    381378 */
    382 static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
     379NO_TRACE static inline void gdtr_load(ptr_16_32_t *gdtr_reg)
    383380{
    384381        asm volatile (
    … …  
    393390 *
    394391 */
    395 static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
     392NO_TRACE static inline void gdtr_store(ptr_16_32_t *gdtr_reg)
    396393{
    397394        asm volatile (
    … …  
    406403 *
    407404 */
    408 static inline void idtr_load(ptr_16_32_t *idtr_reg)
     405NO_TRACE static inline void idtr_load(ptr_16_32_t *idtr_reg)
    409406{
    410407        asm volatile (
    … …  
    419416 *
    420417 */
    421 static inline void tr_load(uint16_t sel)
     418NO_TRACE static inline void tr_load(uint16_t sel)
    422419{
    423420        asm volatile (
    … …  
    427424}
    428425
     426extern void paging_on(void);
     427extern void enable_l_apic_in_msr(void);
     428
     429extern void asm_delay_loop(uint32_t);
     430extern void asm_fake_loop(uint32_t);
     431
     432extern uintptr_t int_0;
     433extern uintptr_t int_1;
     434extern uintptr_t int_2;
     435extern uintptr_t int_3;
     436extern uintptr_t int_4;
     437extern uintptr_t int_5;
     438extern uintptr_t int_6;
     439extern uintptr_t int_7;
     440extern uintptr_t int_8;
     441extern uintptr_t int_9;
     442extern uintptr_t int_10;
     443extern uintptr_t int_11;
     444extern uintptr_t int_12;
     445extern uintptr_t int_13;
     446extern uintptr_t int_14;
     447extern uintptr_t int_15;
     448extern uintptr_t int_16;
     449extern uintptr_t int_17;
     450extern uintptr_t int_18;
     451extern uintptr_t int_19;
     452extern uintptr_t int_20;
     453extern uintptr_t int_21;
     454extern uintptr_t int_22;
     455extern uintptr_t int_23;
     456extern uintptr_t int_24;
     457extern uintptr_t int_25;
     458extern uintptr_t int_26;
     459extern uintptr_t int_27;
     460extern uintptr_t int_28;
     461extern uintptr_t int_29;
     462extern uintptr_t int_30;
     463extern uintptr_t int_31;
     464extern uintptr_t int_32;
     465extern uintptr_t int_33;
     466extern uintptr_t int_34;
     467extern uintptr_t int_35;
     468extern uintptr_t int_36;
     469extern uintptr_t int_37;
     470extern uintptr_t int_38;
     471extern uintptr_t int_39;
     472extern uintptr_t int_40;
     473extern uintptr_t int_41;
     474extern uintptr_t int_42;
     475extern uintptr_t int_43;
     476extern uintptr_t int_44;
     477extern uintptr_t int_45;
     478extern uintptr_t int_46;
     479extern uintptr_t int_47;
     480extern uintptr_t int_48;
     481extern uintptr_t int_49;
     482extern uintptr_t int_50;
     483extern uintptr_t int_51;
     484extern uintptr_t int_52;
     485extern uintptr_t int_53;
     486extern uintptr_t int_54;
     487extern uintptr_t int_55;
     488extern uintptr_t int_56;
     489extern uintptr_t int_57;
     490extern uintptr_t int_58;
     491extern uintptr_t int_59;
     492extern uintptr_t int_60;
     493extern uintptr_t int_61;
     494extern uintptr_t int_62;
     495extern uintptr_t int_63;
     496
    429497#endif
    430498
Note: See TracChangeset for help on using the changeset viewer.