Changeset bd48f4c in mainline for kernel/arch/arm32/src/asm.S
- Timestamp:
- 2010-07-12T10:53:30Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bd11d3e
- Parents:
- c40e6ef (diff), bee2d4c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)links above to see all the changes relative to each parent. - File:
-
- 1 edited
-
kernel/arch/arm32/src/asm.S (modified) (3 diffs)
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kernel/arch/arm32/src/asm.S
rc40e6ef rbd48f4c 1 # 2 #Copyright (c) 2007 Michal Kebrt3 #All rights reserved.4 # 5 #Redistribution and use in source and binary forms, with or without6 #modification, are permitted provided that the following conditions7 #are met:8 # 9 #- Redistributions of source code must retain the above copyright10 #notice, this list of conditions and the following disclaimer.11 #- Redistributions in binary form must reproduce the above copyright12 #notice, this list of conditions and the following disclaimer in the13 #documentation and/or other materials provided with the distribution.14 #- The name of the author may not be used to endorse or promote products15 #derived from this software without specific prior written permission.16 # 17 #THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR18 #IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES19 #OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.20 #IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,21 #INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT22 #NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,23 #DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY24 #THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT25 #(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF26 #THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.27 # 1 /* 2 * Copyright (c) 2007 Michal Kebrt 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * - Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * - Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * - The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 28 29 30 29 .text 31 30 … … 37 36 .global memcpy_from_uspace_failover_address 38 37 .global memcpy_to_uspace_failover_address 38 .global early_putchar 39 39 40 40 memsetb: … … 47 47 memcpy_from_uspace: 48 48 memcpy_to_uspace: 49 add r3, r1, #3 50 bic r3, r3, #3 51 cmp r1, r3 52 stmdb sp!, {r4, r5, lr} 53 mov r5, r0 /* save dst */ 54 beq 4f 55 1: 56 cmp r2, #0 57 movne ip, #0 58 beq 3f 59 2: 60 ldrb r3, [ip, r1] 61 strb r3, [ip, r0] 62 add ip, ip, #1 63 cmp ip, r2 64 bne 2b 65 3: 66 mov r0, r5 67 ldmia sp!, {r4, r5, pc} 68 4: 69 add r3, r0, #3 70 bic r3, r3, #3 71 cmp r0, r3 72 bne 1b 73 movs r4, r2, lsr #2 74 moveq lr, r4 75 beq 6f 76 mov lr, #0 77 mov ip, lr 78 5: 79 ldr r3, [ip, r1] 80 add lr, lr, #1 81 cmp lr, r4 82 str r3, [ip, r0] 83 add ip, ip, #4 84 bne 5b 85 6: 86 ands r4, r2, #3 87 beq 3b 88 mov r3, lr, lsl #2 89 add r0, r3, r0 90 add ip, r3, r1 91 mov r2, #0 92 7: 93 ldrb r3, [r2, ip] 94 strb r3, [r2, r0] 95 add r2, r2, #1 96 cmp r2, r4 97 bne 7b 98 b 3b 49 add r3, r1, #3 50 bic r3, r3, #3 51 cmp r1, r3 52 stmdb sp!, {r4, r5, lr} 53 mov r5, r0 /* save dst */ 54 beq 4f 55 56 1: 57 cmp r2, #0 58 movne ip, #0 59 beq 3f 60 61 2: 62 ldrb r3, [ip, r1] 63 strb r3, [ip, r0] 64 add ip, ip, #1 65 cmp ip, r2 66 bne 2b 67 68 3: 69 mov r0, r5 70 ldmia sp!, {r4, r5, pc} 71 72 4: 73 add r3, r0, #3 74 bic r3, r3, #3 75 cmp r0, r3 76 bne 1b 77 movs r4, r2, lsr #2 78 moveq lr, r4 79 beq 6f 80 mov lr, #0 81 mov ip, lr 82 83 5: 84 ldr r3, [ip, r1] 85 add lr, lr, #1 86 cmp lr, r4 87 str r3, [ip, r0] 88 add ip, ip, #4 89 bne 5b 90 91 6: 92 ands r4, r2, #3 93 beq 3b 94 mov r3, lr, lsl #2 95 add r0, r3, r0 96 add ip, r3, r1 97 mov r2, #0 98 99 7: 100 ldrb r3, [r2, ip] 101 strb r3, [r2, r0] 102 add r2, r2, #1 103 cmp r2, r4 104 bne 7b 105 b 3b 99 106 100 107 memcpy_from_uspace_failover_address: 101 108 memcpy_to_uspace_failover_address: 102 mov r0, #0 103 ldmia sp!, {r4, r5, pc} 109 mov r0, #0 110 ldmia sp!, {r4, r5, pc} 111 112 early_putchar: 113 mov pc, lr
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