Changeset bd48f4c in mainline for kernel/arch/amd64/include/asm.h
- Timestamp:
- 2010-07-12T10:53:30Z (14 years ago)
- Branches:
- lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
- Children:
- bd11d3e
- Parents:
- c40e6ef (diff), bee2d4c (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
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- 1 edited
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kernel/arch/amd64/include/asm.h
rc40e6ef rbd48f4c 39 39 #include <typedefs.h> 40 40 #include <arch/cpu.h> 41 42 extern void asm_delay_loop(uint32_t t); 43 extern void asm_fake_loop(uint32_t t); 41 #include <trace.h> 44 42 45 43 /** Return base address of current stack. … … 50 48 * 51 49 */ 52 static inline uintptr_t get_stack_base(void)50 NO_TRACE static inline uintptr_t get_stack_base(void) 53 51 { 54 52 uintptr_t v; … … 57 55 "andq %%rsp, %[v]\n" 58 56 : [v] "=r" (v) 59 : "0" (~((uint64_t) STACK_SIZE -1))57 : "0" (~((uint64_t) STACK_SIZE - 1)) 60 58 ); 61 59 … … 63 61 } 64 62 65 static inline void cpu_sleep(void) 66 { 67 asm volatile ("hlt\n"); 68 } 69 70 static inline void __attribute__((noreturn)) cpu_halt(void) 63 NO_TRACE static inline void cpu_sleep(void) 64 { 65 asm volatile ( 66 "hlt\n" 67 ); 68 } 69 70 NO_TRACE static inline void __attribute__((noreturn)) cpu_halt(void) 71 71 { 72 72 while (true) { … … 77 77 } 78 78 79 80 79 /** Byte from port 81 80 * … … 86 85 * 87 86 */ 88 static inline uint8_t pio_read_8(ioport8_t *port)87 NO_TRACE static inline uint8_t pio_read_8(ioport8_t *port) 89 88 { 90 89 uint8_t val; … … 107 106 * 108 107 */ 109 static inline uint16_t pio_read_16(ioport16_t *port)108 NO_TRACE static inline uint16_t pio_read_16(ioport16_t *port) 110 109 { 111 110 uint16_t val; … … 128 127 * 129 128 */ 130 static inline uint32_t pio_read_32(ioport32_t *port)129 NO_TRACE static inline uint32_t pio_read_32(ioport32_t *port) 131 130 { 132 131 uint32_t val; … … 149 148 * 150 149 */ 151 static inline void pio_write_8(ioport8_t *port, uint8_t val)150 NO_TRACE static inline void pio_write_8(ioport8_t *port, uint8_t val) 152 151 { 153 152 asm volatile ( 154 153 "outb %b[val], %w[port]\n" 155 :: [val] "a" (val), [port] "d" (port) 154 :: [val] "a" (val), 155 [port] "d" (port) 156 156 ); 157 157 } … … 165 165 * 166 166 */ 167 static inline void pio_write_16(ioport16_t *port, uint16_t val)167 NO_TRACE static inline void pio_write_16(ioport16_t *port, uint16_t val) 168 168 { 169 169 asm volatile ( 170 170 "outw %w[val], %w[port]\n" 171 :: [val] "a" (val), [port] "d" (port) 171 :: [val] "a" (val), 172 [port] "d" (port) 172 173 ); 173 174 } … … 181 182 * 182 183 */ 183 static inline void pio_write_32(ioport32_t *port, uint32_t val)184 NO_TRACE static inline void pio_write_32(ioport32_t *port, uint32_t val) 184 185 { 185 186 asm volatile ( 186 187 "outl %[val], %w[port]\n" 187 :: [val] "a" (val), [port] "d" (port) 188 :: [val] "a" (val), 189 [port] "d" (port) 188 190 ); 189 191 } 190 192 191 193 /** Swap Hidden part of GS register with visible one */ 192 static inline void swapgs(void) 193 { 194 asm volatile("swapgs"); 194 NO_TRACE static inline void swapgs(void) 195 { 196 asm volatile ( 197 "swapgs" 198 ); 195 199 } 196 200 … … 203 207 * 204 208 */ 205 static inline ipl_t interrupts_enable(void) {209 NO_TRACE static inline ipl_t interrupts_enable(void) { 206 210 ipl_t v; 207 211 … … 224 228 * 225 229 */ 226 static inline ipl_t interrupts_disable(void) {230 NO_TRACE static inline ipl_t interrupts_disable(void) { 227 231 ipl_t v; 228 232 … … 244 248 * 245 249 */ 246 static inline void interrupts_restore(ipl_t ipl) {250 NO_TRACE static inline void interrupts_restore(ipl_t ipl) { 247 251 asm volatile ( 248 252 "pushq %[ipl]\n" … … 259 263 * 260 264 */ 261 static inline ipl_t interrupts_read(void) {265 NO_TRACE static inline ipl_t interrupts_read(void) { 262 266 ipl_t v; 263 267 … … 276 280 * 277 281 */ 278 static inline bool interrupts_disabled(void)282 NO_TRACE static inline bool interrupts_disabled(void) 279 283 { 280 284 ipl_t v; … … 289 293 } 290 294 291 292 295 /** Write to MSR */ 293 static inline void write_msr(uint32_t msr, uint64_t value)296 NO_TRACE static inline void write_msr(uint32_t msr, uint64_t value) 294 297 { 295 298 asm volatile ( … … 301 304 } 302 305 303 static inline unative_t read_msr(uint32_t msr)306 NO_TRACE static inline unative_t read_msr(uint32_t msr) 304 307 { 305 308 uint32_t ax, dx; … … 314 317 } 315 318 316 317 319 /** Enable local APIC 318 320 * … … 320 322 * 321 323 */ 322 static inline void enable_l_apic_in_msr()324 NO_TRACE static inline void enable_l_apic_in_msr() 323 325 { 324 326 asm volatile ( … … 328 330 "orl $(0xfee00000),%%eax\n" 329 331 "wrmsr\n" 330 ::: "%eax", "%ecx","%edx"332 ::: "%eax", "%ecx", "%edx" 331 333 ); 332 334 } … … 337 339 * 338 340 */ 339 static inline void invlpg(uintptr_t addr)341 NO_TRACE static inline void invlpg(uintptr_t addr) 340 342 { 341 343 asm volatile ( … … 350 352 * 351 353 */ 352 static inline void gdtr_load(ptr_16_64_t *gdtr_reg)354 NO_TRACE static inline void gdtr_load(ptr_16_64_t *gdtr_reg) 353 355 { 354 356 asm volatile ( … … 363 365 * 364 366 */ 365 static inline void gdtr_store(ptr_16_64_t *gdtr_reg)367 NO_TRACE static inline void gdtr_store(ptr_16_64_t *gdtr_reg) 366 368 { 367 369 asm volatile ( … … 376 378 * 377 379 */ 378 static inline void idtr_load(ptr_16_64_t *idtr_reg)380 NO_TRACE static inline void idtr_load(ptr_16_64_t *idtr_reg) 379 381 { 380 382 asm volatile ( … … 388 390 * 389 391 */ 390 static inline void tr_load(uint16_t sel)392 NO_TRACE static inline void tr_load(uint16_t sel) 391 393 { 392 394 asm volatile ( … … 396 398 } 397 399 398 #define GEN_READ_REG(reg) static inline unative_t read_ ##reg (void) \400 #define GEN_READ_REG(reg) NO_TRACE static inline unative_t read_ ##reg (void) \ 399 401 { \ 400 402 unative_t res; \ … … 406 408 } 407 409 408 #define GEN_WRITE_REG(reg) static inline void write_ ##reg (unative_t regn) \410 #define GEN_WRITE_REG(reg) NO_TRACE static inline void write_ ##reg (unative_t regn) \ 409 411 { \ 410 412 asm volatile ( \ … … 436 438 extern void interrupt_handlers(void); 437 439 440 extern void asm_delay_loop(uint32_t); 441 extern void asm_fake_loop(uint32_t); 442 438 443 #endif 439 444
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