Changeset b828907 in mainline for uspace/drv/bus/pci/pciintel/pci.c


Ignore:
Timestamp:
2012-07-20T20:29:54Z (12 years ago)
Author:
Frantisek Princ <frantisek.princ@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
34bc2fe
Parents:
4cdac68 (diff), 6de2d766 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the (diff) links above to see all the changes relative to each parent.
Message:

Merge with mainline

File:
1 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/bus/pci/pciintel/pci.c

    r4cdac68 rb828907  
    3838
    3939#include <assert.h>
     40#include <byteorder.h>
    4041#include <stdio.h>
    4142#include <errno.h>
     
    231232        void *addr = bus->conf_data_port + (reg & 3);
    232233       
    233         pio_write_32(bus->conf_addr_port, conf_addr);
     234        pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
    234235       
    235236        switch (len) {
    236237        case 1:
     238                /* No endianness change for 1 byte */
    237239                buf[0] = pio_read_8(addr);
    238240                break;
    239241        case 2:
    240                 ((uint16_t *) buf)[0] = pio_read_16(addr);
     242                ((uint16_t *) buf)[0] = uint16_t_le2host(pio_read_16(addr));
    241243                break;
    242244        case 4:
    243                 ((uint32_t *) buf)[0] = pio_read_32(addr);
     245                ((uint32_t *) buf)[0] = uint32_t_le2host(pio_read_32(addr));
    244246                break;
    245247        }
     
    254256        fibril_mutex_lock(&bus->conf_mutex);
    255257       
    256         uint32_t conf_addr;
    257         conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg);
     258        const uint32_t conf_addr = CONF_ADDR(fun->bus, fun->dev, fun->fn, reg);
    258259        void *addr = bus->conf_data_port + (reg & 3);
    259260       
    260         pio_write_32(bus->conf_addr_port, conf_addr);
     261        pio_write_32(bus->conf_addr_port, host2uint32_t_le(conf_addr));
    261262       
    262263        switch (len) {
    263264        case 1:
     265                /* No endianness change for 1 byte */
    264266                pio_write_8(addr, buf[0]);
    265267                break;
    266268        case 2:
    267                 pio_write_16(addr, ((uint16_t *) buf)[0]);
     269                pio_write_16(addr, host2uint16_t_le(((uint16_t *) buf)[0]));
    268270                break;
    269271        case 4:
    270                 pio_write_32(addr, ((uint32_t *) buf)[0]);
     272                pio_write_32(addr, host2uint32_t_le(((uint32_t *) buf)[0]));
    271273                break;
    272274        }
     
    650652        got_res = true;
    651653       
     654       
     655        assert(hw_resources.count > 1);
     656        assert(hw_resources.resources[0].type == IO_RANGE);
     657        assert(hw_resources.resources[0].res.io_range.size >= 4);
     658       
     659        assert(hw_resources.resources[1].type == IO_RANGE);
     660        assert(hw_resources.resources[1].res.io_range.size >= 4);
     661       
    652662        ddf_msg(LVL_DEBUG, "conf_addr = %" PRIx64 ".",
    653663            hw_resources.resources[0].res.io_range.address);
    654        
    655         assert(hw_resources.count > 0);
    656         assert(hw_resources.resources[0].type == IO_RANGE);
    657         assert(hw_resources.resources[0].res.io_range.size == 8);
     664        ddf_msg(LVL_DEBUG, "data_addr = %" PRIx64 ".",
     665            hw_resources.resources[1].res.io_range.address);
    658666       
    659667        bus->conf_io_addr =
    660668            (uint32_t) hw_resources.resources[0].res.io_range.address;
    661        
    662         if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 8,
     669        bus->conf_io_data =
     670            (uint32_t) hw_resources.resources[1].res.io_range.address;
     671       
     672        if (pio_enable((void *)(uintptr_t)bus->conf_io_addr, 4,
    663673            &bus->conf_addr_port)) {
    664674                ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
     
    666676                goto fail;
    667677        }
    668         bus->conf_data_port = (char *) bus->conf_addr_port + 4;
     678        if (pio_enable((void *)(uintptr_t)bus->conf_io_data, 4,
     679            &bus->conf_data_port)) {
     680                ddf_msg(LVL_ERROR, "Failed to enable configuration ports.");
     681                rc = EADDRNOTAVAIL;
     682                goto fail;
     683        }
    669684       
    670685        /* Make the bus device more visible. It has no use yet. */
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