Changeset b130d0e in mainline


Ignore:
Timestamp:
2011-10-24T13:17:26Z (12 years ago)
Author:
Jan Vesely <jano.vesely@…>
Branches:
lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export
Children:
b7f7183
Parents:
25f8e5d
Message:

sb16: Dump PNP registers on startup. Move well-known mixer addresses to one place.

Location:
uspace/drv/audio/sb16
Files:
4 edited

Legend:

Unmodified
Added
Removed
  • uspace/drv/audio/sb16/dma_controller.c

    r25f8e5d rb130d0e  
    168168static dma_controller_t controller_8237 = {
    169169        .channels = {
    170             /* The first chip */
     170            /* The first chip 8-bit */
    171171            { (uint8_t*)0x00, (uint8_t*)0x01, (uint8_t*)0x87,
    172172              (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, },
     
    178178              (uint8_t*)0x0a, (uint8_t*)0x0b, (uint8_t*)0x0c, },
    179179
    180             /* The second chip */
     180            /* The second chip 16-bit */
    181181            { (uint8_t*)0xc0, (uint8_t*)0xc2, (uint8_t*)0x8f,
    182182              (uint8_t*)0xd4, (uint8_t*)0xd6, (uint8_t*)0xd8, },
     
    298298                return EIO;
    299299
    300         dma_channel_t dma_channel = controller_8237.channels[channel];
     300        const dma_channel_t dma_channel = controller_8237.channels[channel];
    301301
    302302        /* Mask DMA request */
     
    311311            | (auto_mode ? DMA_MODE_CHAN_AUTO_FLAG : 0)
    312312            | (mode << DMA_MODE_CHAN_MODE_SHIFT);
    313         ddf_log_verbose("Setting mode: %hhx.\n", value);
     313        ddf_log_verbose("Setting DMA mode: %hhx.\n", value);
    314314        pio_write_8(dma_channel.mode_address, value);
    315315
  • uspace/drv/audio/sb16/mixer.c

    r25f8e5d rb130d0e  
    3434#include "mixer.h"
    3535
    36 #define CT_MIXER_RESET_ADDRESS 0x00
    37 
    3836typedef struct channel {
    3937        uint8_t address;
     
    186184
    187185        if (type != SB_MIXER_NONE) {
    188                 pio_write_8(&regs->mixer_address, CT_MIXER_RESET_ADDRESS);
     186                pio_write_8(&regs->mixer_address, MIXER_RESET_ADDRESS);
    189187                pio_write_8(&regs->mixer_data, 1);
    190188                sb_mixer_max_master_levels(mixer);
    191189        }
     190        pio_write_8(&regs->mixer_address, MIXER_PNP_IRQ_ADDRESS);
     191        const uint8_t irq = pio_read_8(&regs->mixer_data);
     192        pio_write_8(&regs->mixer_address, MIXER_PNP_DMA_ADDRESS);
     193        const uint8_t dma = pio_read_8(&regs->mixer_data);
     194        ddf_log_debug("SB16 setup with IRQ 0x%hhx and DMA 0x%hhx.\n", irq, dma);
    192195        return EOK;
    193196}
  • uspace/drv/audio/sb16/registers.h

    r25f8e5d rb130d0e  
    4444        ioport8_t afm_data;
    4545        ioport8_t mixer_address;
    46 #define MIXER_IRQ_ADDRESS 0x82 /* The Interrupt Status register, addressed as
    47                                 * register 82h on the Mixer register map p.27 */
     46#define MIXER_RESET_ADDRESS 0x00
     47#define MIXER_PNP_IRQ_ADDRESS 0x80
     48#define MIXER_PNP_DMA_ADDRESS 0x81
     49#define MIXER_IRQ_STATUS_ADDRESS 0x82 /* The Interrupt Status register,
     50                                       * addressed as register 82h on the
     51                                       * Mixer register map p.27 */
    4852        ioport8_t mixer_data;
    4953        ioport8_t dsp_reset;
  • uspace/drv/audio/sb16/sb16.c

    r25f8e5d rb130d0e  
    107107         * differently */
    108108        if (drv->dsp.version.major >= 4) {
    109                 pio_write_8(&drv->regs->mixer_address, MIXER_IRQ_ADDRESS);
     109                pio_write_8(&drv->regs->mixer_address, MIXER_IRQ_STATUS_ADDRESS);
    110110                const uint8_t irq_mask = pio_read_8(&drv->regs->mixer_data);
    111111                ddf_log_debug("SB16 IRQ mask %hhx.\n", irq_mask);
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