Changeset 9b56e528 in mainline for uspace/drv/bus/usb/xhci/hw_struct/regs.h

Timestamp:

2018-01-13T15:13:44Z (6 years ago)

Author:

Ondřej Hlavatý <aearsis@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

36fb6d7

Parents:

37b13175

git-author:

Ondřej Hlavatý <aearsis@…> (2018-01-13 15:11:45)

git-committer:

Ondřej Hlavatý <aearsis@…> (2018-01-13 15:13:44)

Message:

xhci rh: better not disable port on any event

The result of a long debugging is that PED bit is RW1C, which means
that enabled port disables itself when asserting events.

File:

• uspace/drv/bus/usb/xhci/hw_struct/regs.h (modified) (2 diffs)

uspace/drv/bus/usb/xhci/hw_struct/regs.h

@@ -300 +300 @@
 #define XHCI_PORT_WDE           portsc, 32,  FLAG, 26
 #define XHCI_PORT_WOE           portsc, 32,  FLAG, 27
-#define XHCI_PORT_DR            portsc, 32,  FLAG, 28
-#define XHCI_PORT_WPR           portsc, 32,  FLAG, 29
+#define XHCI_PORT_DR            portsc, 32,  FLAG, 30
+#define XHCI_PORT_WPR           portsc, 32,  FLAG, 31
 
 #define XHCI_PORT_USB3_U1TO   portpmsc, 32, RANGE,  7,  0
@@ -316 +316 @@
 #define XHCI_PORT_USB2_HLE    portpmsc, 32,  FLAG, 16
 #define XHCI_PORT_USB2_TM     portpmsc, 32, RANGE, 31, 28
-#define XHCI_PORT_USB2_HIRDM porthlmpc, 32, RANGE,  1,  0
-#define XHCI_PORT_USB2_L1TO  porthlmpc, 32, RANGE,  9,  2
-#define XHCI_PORT_USB2_BESLD porthlmpc, 32, RANGE, 13, 10
+#define XHCI_PORT_USB2_HIRDM porthlpmc, 32, RANGE,  1,  0
+#define XHCI_PORT_USB2_L1TO  porthlpmc, 32, RANGE,  9,  2
+#define XHCI_PORT_USB2_BESLD porthlpmc, 32, RANGE, 13, 10
 
 /**