Changeset 9b2f69e in mainline for uspace/drv/bus/usb/xhci/transfers.h

Timestamp:

2017-10-15T20:08:16Z (7 years ago)

Author:

Petr Manek <petr.manek@…>

Branches:

lfn, master, serial, ticket/834-toolchain-update, topic/msim-upgrade, topic/simplify-dev-export

Children:

b7db009

Parents:

816f5f4

Message:

Setting up endpoint contexts (almost) properly. Boilerplate for interrupt transfers. Simplified TRB ring initialization.

File:

• uspace/drv/bus/usb/xhci/transfers.h (modified) (1 diff)

uspace/drv/bus/usb/xhci/transfers.h

@@ -54 +54 @@
 int xhci_schedule_control_transfer(xhci_hc_t*, usb_transfer_batch_t*);
 int xhci_schedule_bulk_transfer(xhci_hc_t*, usb_transfer_batch_t*);
+int xhci_schedule_interrupt_transfer(xhci_hc_t*, usb_transfer_batch_t*);
 int xhci_handle_transfer_event(xhci_hc_t*, xhci_trb_t*);